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* Move X86MCInstLower class definition into implementation file. It's not ↵Craig Topper2012-10-163-54/+25
| | | | | | needed outside. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166014 91177308-0d34-0410-b5e6-96231b3b80d8
* Cleanup whitespace.Bill Wendling2012-10-161-37/+35
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166013 91177308-0d34-0410-b5e6-96231b3b80d8
* Have AttributesImpl defriend the Attributes class.Bill Wendling2012-10-162-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166012 91177308-0d34-0410-b5e6-96231b3b80d8
* Have AttrBuilder defriend the Attributes class.Bill Wendling2012-10-161-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166011 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the Attributes::get method which takes an AttrVal value directly to ↵Bill Wendling2012-10-163-34/+13
| | | | | | simplify the code a bit. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166009 91177308-0d34-0410-b5e6-96231b3b80d8
* Put simple c'tors inline.Bill Wendling2012-10-161-6/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166008 91177308-0d34-0410-b5e6-96231b3b80d8
* Pass in the context to the Attributes::get method.Bill Wendling2012-10-161-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166007 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix filename in file header.Craig Topper2012-10-161-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166004 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: Added handleMove support for updating all kill flags, not just for ↵Andrew Trick2012-10-162-8/+21
| | | | | | | | | allocatable regs. This is a medium term workaround until we have a more robust solution in the form of a register liveness utility for postRA passes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166001 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused BitVectors from getAllocatableSet().Jakob Stoklund Olesen2012-10-163-9/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165999 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove RegisterClassInfo::isReserved() and isAllocatable().Jakob Stoklund Olesen2012-10-156-17/+18
| | | | | | Clients can use the equivalent functions in MRI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165990 91177308-0d34-0410-b5e6-96231b3b80d8
* Add __builtin_setjmp/_longjmp supprt in X86 backendMichael Liao2012-10-157-1/+260
| | | | | | | | | | | | | - Besides used in SjLj exception handling, __builtin_setjmp/__longjmp is also used as a light-weight replacement of setjmp/longjmp which are used to implementation continuation, user-level threading, and etc. The support added in this patch ONLY addresses this usage and is NOT intended to support SjLj exception handling as zero-cost DWARF exception handling is used by default in X86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165989 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove LIS::isAllocatable() and isReserved() helpers.Jakob Stoklund Olesen2012-10-154-7/+5
| | | | | | All callers can simply use the corresponding MRI functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165985 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch most getReservedRegs() clients to the MRI equivalent.Jakob Stoklund Olesen2012-10-1510-40/+25
| | | | | | | Using the cached bit vector in MRI avoids comstantly allocating and recomputing the reserved register bit vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165983 91177308-0d34-0410-b5e6-96231b3b80d8
* Freeze the reserved registers as soon as isel is complete.Jakob Stoklund Olesen2012-10-152-9/+10
| | | | | | | | | | | | | Also provide an MRI::getReservedRegs() function to access the frozen register set, and isReserved() and isAllocatable() methods to test individual registers. The various implementations of TRI::getReservedRegs() are quite complicated, and many passes need to look at the reserved register set. This patch makes it possible for these passes to use the cached copy in MRI, avoiding a lot of malloc traffic and repeated calculations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165982 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: v1i64 and v2i64 VBSL intrinsic support.Jim Grosbach2012-10-151-0/+17
| | | | | | rdar://12502028 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165981 91177308-0d34-0410-b5e6-96231b3b80d8
* Move the Attributes::Builder outside of the Attributes class and into its ↵Bill Wendling2012-10-1516-71/+109
| | | | | | own class named AttrBuilder. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165960 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] If we parsed a statement and the opcode is valid, then it's ↵Chad Rosier2012-10-152-5/+5
| | | | | | an instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165955 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure we iterate over newly created instructions. Fixes pr13625. Testcase toRafael Espindola2012-10-151-0/+5
| | | | | | follow in one sec. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165951 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: ILP scheduler for experimental heuristics.Andrew Trick2012-10-152-20/+197
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165950 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] Update the end loc for ParseIntelMemOperand.Chad Rosier2012-10-151-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165947 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] Add a few new APIs to the AsmParser class in support of MS-StyleChad Rosier2012-10-151-13/+34
| | | | | | | | | | inline assembly. For the time being, these will be called directly by clang. However, in the near future I expect these to be sunk back into the MC layer and more basic APIs (e.g., getClobbers(), getConstraints(), etc.) will be called by clang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165946 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] Use incoming argument rather than hard coding to false.Chad Rosier2012-10-151-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165945 91177308-0d34-0410-b5e6-96231b3b80d8
* Resubmit the changes to llvm core to update the functions to support ↵Micah Villmow2012-10-1535-92/+144
| | | | | | different pointer sizes on a per address space basis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165941 91177308-0d34-0410-b5e6-96231b3b80d8
* PowerPC: add EmitTCEntry class for TOC creationAdhemerval Zanella2012-10-154-2/+23
| | | | | | | | This patch replaces the EmitRawText by a EmitTCEntry class (specialized for each Streamer) in PowerPC64 TOC entry creation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165940 91177308-0d34-0410-b5e6-96231b3b80d8
* [asan] make AddressSanitizer to be a FunctionPass instead of ModulePass. ↵Kostya Serebryany2012-10-151-63/+52
| | | | | | This will simplify chaining other FunctionPasses with asan. Also some minor cleanup git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165936 91177308-0d34-0410-b5e6-96231b3b80d8
* Update the memcpy rewriting to fully support widened int rewriting. ThisChandler Carruth2012-10-151-8/+26
| | | | | | | | includes extracting ints for copying elsewhere and inserting ints when copying into the alloca. This should fix the CanSROA assertion coming out of Clang's regression test suite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165931 91177308-0d34-0410-b5e6-96231b3b80d8
* Follow-up fix to r165928: handle memset rewriting for widened integers,Chandler Carruth2012-10-151-30/+25
| | | | | | | and generally clean up the memset handling. It had rotted a bit as the other rewriting logic got polished more. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165930 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed PR13938: the ARM backend was crashing because it couldn't select a ↵Silviu Baranga2012-10-151-2/+19
| | | | | | VDUPLANE node with the vector input size different from the output size. This was bacause the BUILD_VECTOR lowering code didn't check that the size of the input vector was correct for using VDUPLANE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165929 91177308-0d34-0410-b5e6-96231b3b80d8
* First major step toward addressing PR14059. This teaches SROA to handleChandler Carruth2012-10-151-53/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cases where we have partial integer loads and stores to an otherwise promotable alloca to widen[1] those loads and stores to cover the entire alloca and bitcast them into the appropriate type such that promotion can proceed. These partial loads and stores stem from an annoying confluence of ARM's calling convention and ABI lowering and the FCA pre-splitting which takes place in SROA. Clang lowers a { double, double } in-register function argument as a [4 x i32] function argument to ensure it is placed into integer 32-bit registers (a really unnerving implicit contract between Clang and the ARM backend I would add). This results in a FCA load of [4 x i32]* from the { double, double } alloca, and SROA decomposes this into a sequence of i32 loads and stores. Inlining proceeds, code gets folded, but at the end of the day, we still have i32 stores to the low and high halves of a double alloca. Widening these to be i64 operations, and bitcasting them to double prior to loading or storing allows promotion to proceed for these allocas. I looked quite a bit changing the IR which Clang produces for this case to be more friendly, but small changes seem unlikely to help. I think the best representation we could use currently would be to pass 4 i32 arguments thereby avoiding any FCAs, but that would still require this fix. It seems like it might eventually be nice to somehow encode the ABI register selection choices outside of the parameter type system so that the parameter can be a { double, double }, but the CC register annotations indicate that this should be passed via 4 integer registers. This patch does not address the second problem in PR14059, which is the reverse: when a struct alloca is loaded as a *larger* single integer. This patch also does not address some of the code quality issues with the FCA-splitting. Those don't actually impede any optimizations really, but they're on my list to clean up. [1]: Pedantic footnote: for those concerned about memory model issues here, this is safe. For the alloca to be promotable, it cannot escape or have any use of its address that could allow these loads or stores to be racing. Thus, widening is always safe. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165928 91177308-0d34-0410-b5e6-96231b3b80d8
* Hoist the canConvertValue predicate and the convertValue transform outChandler Carruth2012-10-151-44/+52
| | | | | | | into static helper functions. They're really quite generic and are going to be needed elsewhere shortly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165927 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an enum for the return and function indexes into the AttrListPtr object. ↵Bill Wendling2012-10-1510-69/+109
| | | | | | This gets rid of some magic numbers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165924 91177308-0d34-0410-b5e6-96231b3b80d8
* Use a ::get method to create the attribute from Attributes::AttrVals instead ↵Bill Wendling2012-10-151-8/+7
| | | | | | of a constructor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165923 91177308-0d34-0410-b5e6-96231b3b80d8
* Move the AttributesImpl header file into the VMCore directory so that it can ↵Bill Wendling2012-10-153-1/+57
| | | | | | be opaque. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165920 91177308-0d34-0410-b5e6-96231b3b80d8
* Attributes RewriteBill Wendling2012-10-1516-94/+134
| | | | | | | | | | | Convert the internal representation of the Attributes class into a pointer to an opaque object that's uniqued by and stored in the LLVMContext object. The Attributes class then becomes a thin wrapper around this opaque object. Eventually, the internal representation will be expanded to include attributes that represent code generation options, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165917 91177308-0d34-0410-b5e6-96231b3b80d8
* instcombine: Migrate strcmp and strncmp optimizationsMeador Inge2012-10-152-105/+99
| | | | | | | This patch migrates the strcmp and strncmp optimizations from the simplify-libcalls pass into the instcombine library call simplifier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165915 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify code. No functionality change.Benjamin Kramer2012-10-141-5/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165904 91177308-0d34-0410-b5e6-96231b3b80d8
* Unquadratize SetVector removal loops in DSE.Benjamin Kramer2012-10-141-27/+36
| | | | | | | | | Erasing from the beginning or middle of the vector is expensive, remove_if can do it in linear time even though it's a bit ugly without lambdas. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165903 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dead methods.Bill Wendling2012-10-141-8/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165902 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove operator cast method in favor of querying with the correct method.Bill Wendling2012-10-145-22/+39
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165899 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix use after free when deleting attributes in a chained folding set.Benjamin Kramer2012-10-141-3/+5
| | | | | | Can't follow the intrusive linked list when the element is gone. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165898 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't use the new syntax just yet.Bill Wendling2012-10-141-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165897 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the bitwise AND operators from the Attributes class. Replace it with ↵Bill Wendling2012-10-144-14/+9
| | | | | | the equivalent from the builder class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165896 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the bitwise assignment OR operator from the Attributes class. Replace ↵Bill Wendling2012-10-147-24/+35
| | | | | | it with the equivalent from the builder class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165895 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the bitwise OR operator from the Attributes class. Replace it with ↵Bill Wendling2012-10-141-7/+9
| | | | | | the equivalent from the builder class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165894 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the bitwise XOR operator from the Attributes class. Replace it with ↵Bill Wendling2012-10-143-7/+6
| | | | | | the equivalent from the builder class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165893 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the bitwise NOT operator from the Attributes class. Replace it with ↵Bill Wendling2012-10-146-19/+26
| | | | | | the equivalent from the builder class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165892 91177308-0d34-0410-b5e6-96231b3b80d8
* Decode the LLVM attributes from bitcode using the attributes builder.Bill Wendling2012-10-141-0/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165891 91177308-0d34-0410-b5e6-96231b3b80d8
* Use builder to create alignment attributes. Remove dead function.Bill Wendling2012-10-142-9/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165890 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't pass in an Attributes object to something that expects an integral value.Bill Wendling2012-10-141-3/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165887 91177308-0d34-0410-b5e6-96231b3b80d8
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