| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Change some ARM subtarget features to be single bit yes/no in order to sink t... | Evan Cheng | 2011-07-07 | 1 | -2/+2 |
| * | Since ARM's prefetch implementation predicted the presence of a instruction | Bruno Cardoso Lopes | 2011-06-14 | 1 | -0/+11 |
| * | Add one more argument to the prefetch intrinsic to indicate whether it's a data | Bruno Cardoso Lopes | 2011-06-14 | 1 | -6/+6 |
| * | Add -mcpu=cortex-a9-mp. It's cortex-a9 with MP extension. rdar://8648637. | Bob Wilson | 2011-04-19 | 1 | -8/+13 |
| * | Fix @llvm.prefetch isel. Selecting between pld / pldw using the first immedia... | Evan Cheng | 2010-11-04 | 1 | -16/+13 |
| * | Fix preload instruction isel. Only v7 supports pli, and only v7 with mp exten... | Evan Cheng | 2010-11-03 | 1 | -2/+2 |
| * | Add support to match @llvm.prefetch to pld / pldw / pli. rdar://8601536. | Evan Cheng | 2010-11-03 | 1 | -0/+64 |
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