| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | ARM VLDR/VSTR instructions don't need a size suffix. | Jim Grosbach | 2011-11-14 | 1 | -1/+1 |
| * | Add missing correctness check to ARMTargetLowering::ReconstructShuffle. Fixe... | Eli Friedman | 2011-10-14 | 1 | -0/+17 |
| * | Some minor cleanups based on feedback. | Bill Wendling | 2011-03-15 | 1 | -0/+12 |
| * | Generate a VTBL instruction instead of a series of loads and stores when we | Bill Wendling | 2011-03-14 | 1 | -12/+0 |
| * | Lower some BUILD_VECTORS using VEXT+shuffle. | Bob Wilson | 2011-01-07 | 1 | -0/+59 |
| * | Allow more cases of undef shuffle indices and add tests for them. | Bob Wilson | 2010-08-17 | 1 | -0/+20 |
| * | Remove arm_apcscc from the test files. It is the default and doing this | Rafael Espindola | 2010-06-17 | 1 | -6/+6 |
| * | Eliminate more uses of llvm-as and llvm-dis. | Dan Gohman | 2009-09-09 | 1 | -1/+1 |
| * | Add some tests for vext.16 and vext.32. | Bob Wilson | 2009-08-21 | 1 | -0/+19 |
| * | Add support for Neon VEXT (vector extract) shuffles. | Bob Wilson | 2009-08-19 | 1 | -0/+37 |
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