aboutsummaryrefslogtreecommitdiffstats
path: root/test/CodeGen/ARM
Commit message (Expand)AuthorAgeFilesLines
* Stack Alignment: when creating stack objects in MachineFrameInfo, make sureManman Ren2012-12-041-0/+48
* Simplify REG_SEQUENCE lowering.Jakob Stoklund Olesen2012-12-011-3/+3
* Codegen failure for vmull with small vectorsSebastian Pop2012-11-301-0/+150
* Handle the situation where CodeGenPrepare removes a reference to a BB that hasBill Wendling2012-11-291-0/+23
* Added atomic 64 min/max/umin/umax instrinsics support in the ARM backend.Silviu Baranga2012-11-291-0/+61
* Avoid rewriting instructions twice.Jakob Stoklund Olesen2012-11-291-0/+41
* ARM: Implement CanLowerReturn so large vectors get expanded into sret.Benjamin Kramer2012-11-281-0/+12
* Add -verify-machineinstrs to these fast-isel test cases.Chad Rosier2012-11-274-6/+6
* CSE: allow PerformTrivialCoalescing to check copies across basic blockManman Ren2012-11-271-0/+32
* Never use .lcomm on platforms where it does not accept an alignmentUlrich Weigand2012-11-272-3/+5
* Extend test case for r168657.Chad Rosier2012-11-271-0/+30
* Fix physical register liveness calculations:Tim Northover2012-11-201-0/+20
* Factor out type info emission into separate routine.Anton Korobeynikov2012-11-191-0/+77
* Mark FP_EXTEND form v2f32 to v2f64 as "expand" for ARM NEON. Patch by Pete C...Eli Friedman2012-11-171-0/+8
* [fast-isel] Add the -verify-machineinstrs to these test cases. The remainingChad Rosier2012-11-178-15/+15
* Remove hard coded registers in ARM ldrexd and strexd instructionsWeiming Zhao2012-11-161-41/+41
* Make sure FABS on v2f32 and v4f32 is legal on ARM NEONAnton Korobeynikov2012-11-161-0/+17
* Mark FP_ROUND for converting NEON v2f64 to v2f32 as expand. Add a missingEli Friedman2012-11-151-0/+9
* The code pattern "imm0_255_neg" is used for checking if an immediate value is...Nadav Rotem2012-11-141-0/+31
* Fix really stupid ARM EHABI info generation bug: we should not emitAnton Korobeynikov2012-11-141-0/+18
* Use TARGET2 relocation for TType references on ARM.Anton Korobeynikov2012-11-141-0/+44
* Cleanup the main RegisterCoalescer loop.Andrew Trick2012-11-131-1/+1
* misched: Infrastructure for weak DAG edges.Andrew Trick2012-11-121-0/+2
* Disable the Thumb no-return call optimization:Evan Cheng2012-11-102-15/+0
* Recommit modified r167540.Amara Emerson2012-11-081-2/+2
* Vext Lowering was missing opportunitiesQuentin Colombet2012-11-021-0/+33
* Change ForceSizeOpt attribute into MinSize attributeQuentin Colombet2012-10-301-2/+2
* Completely disallow partial copies in adjustCopiesBackFrom().Jakob Stoklund Olesen2012-10-291-0/+28
* [code size][ARM] Emit regular call instructions instead of the move, branch s...Quentin Colombet2012-10-271-0/+34
* Revert r163298 "Optimize codegen for VSETLNi{8,16,32} operating on Q registers."Jakob Stoklund Olesen2012-10-262-2/+2
* Fix a miscompilation caused by a typo. When turning a adde with negative valueEvan Cheng2012-10-241-0/+13
* When a block ends in an indirect branch, add its successors to the machine ba...Bill Wendling2012-10-221-0/+46
* This patch is to fix radar://8426430. It is about llvm support of __builtin_d...Shuxin Yang2012-10-191-0/+12
* ARM:Stepan Dyatkovskiy2012-10-191-0/+29
* Revert r166046 "Switch back to the old coalescer for now to fix the 32 bit bit"Jakob Stoklund Olesen2012-10-161-1/+1
* Switch back to the old coalescer for now to fix the 32 bit bitRafael Espindola2012-10-161-1/+1
* Issue:Stepan Dyatkovskiy2012-10-162-12/+61
* ARM: v1i64 and v2i64 VBSL intrinsic support.Jim Grosbach2012-10-151-0/+30
* Fixed PR13938: the ARM backend was crashing because it couldn't select a VDUP...Silviu Baranga2012-10-151-0/+36
* Drop <def,dead> flags when merging into an unused lane.Jakob Stoklund Olesen2012-10-131-1/+27
* Allow for loops in LiveIntervals::pruneValue().Jakob Stoklund Olesen2012-10-131-0/+49
* ARM: tail-call inside a function where part of a byval argument is on caller'sManman Ren2012-10-122-0/+49
* ARM: Mark VSELECT as 'expand'.Jim Grosbach2012-10-121-0/+12
* Legalizer optimize a pair of div / mod to a call to divrem libcall if they areEvan Cheng2012-10-121-12/+34
* Add isel patterns for v2f32 / v4f32 neon.vbsl intrinsics. rdar://12471808Evan Cheng2012-10-101-0/+18
* Fix for LDRB instruction:Stepan Dyatkovskiy2012-10-101-0/+23
* Issue description:Stepan Dyatkovskiy2012-10-101-0/+19
* ARM: locate user-defined text sections next to default text.Jim Grosbach2012-10-041-0/+21
* Fixed a bug in the ExecutionDependencyFix pass that caused dependencies to no...Silviu Baranga2012-10-031-0/+22
* Make sure the whole live range is covered when values are pruned twice.Jakob Stoklund Olesen2012-10-021-1/+26
generated by cgit v1.1 at 2025-03-23 13:51:40 +0000