aboutsummaryrefslogtreecommitdiffstats
path: root/test/CodeGen/ARM
Commit message (Expand)AuthorAgeFilesLines
* Replace the arm.neon.vmovls and vmovlu intrinsics with vector sign-extend andBob Wilson2010-08-202-21/+6
* When sending stats output to stdout for grepping, don't emit normalDan Gohman2010-08-181-1/+1
* Expand ZERO_EXTEND operations for NEON vector types.Bob Wilson2010-08-181-0/+7
* Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoidBob Wilson2010-08-171-1/+1
* Allow more cases of undef shuffle indices and add tests for them.Bob Wilson2010-08-175-0/+119
* PHI elimination should not break back edge. It can cause some significant cod...Evan Cheng2010-08-171-0/+29
* Add a testcase for svn 111208.Bob Wilson2010-08-161-0/+14
* Generalize a pattern for PKHTB: an SRL of 16-31 bits will guaranteeBob Wilson2010-08-161-1/+10
* Convert a test to use FileCheck.Bob Wilson2010-08-161-4/+19
* Temporarily disable tail calls on ARM to work around some linker problems.Bob Wilson2010-08-132-0/+2
* Consider this code snippet:Bill Wendling2010-08-111-0/+25
* Report error if codegen tries to instantiate a ARM target when the cpu does s...Evan Cheng2010-08-111-10/+0
* Update test to match output of optimize compares for ARM.Bill Wendling2010-08-111-4/+2
* The optimize comparisons pass removes the "cmp" instruction this is checking ...Bill Wendling2010-08-101-1/+0
* Fix eabi calling convention when a 64 bit value shadows r3.Rafael Espindola2010-08-061-0/+14
* Testcase for r110248.Bill Wendling2010-08-041-0/+65
* Combine NEON VABD (absolute difference) intrinsics with ADDs to make VABABob Wilson2010-08-041-0/+24
* Currently EH lowering code expects typeinfo to be global only.Anton Korobeynikov2010-07-261-0/+95
* - Allow target to specify when is register pressure "too high". In most cases,Evan Cheng2010-07-231-8/+8
* More register pressure aware scheduling work.Evan Cheng2010-07-211-8/+8
* Baby steps towards ARM fast-isel.Eric Christopher2010-07-211-0/+15
* Fix calling convention on ARM if vfp2+ is enabled.Rafael Espindola2010-07-211-5/+23
* Add combiner patterns to more effectively utilize the BFI (bitfield insert)Jim Grosbach2010-07-171-0/+23
* Add basic support to code-gen the ARM/Thumb2 bit-field insert (BFI) instructionJim Grosbach2010-07-161-0/+17
* Split -enable-finite-only-fp-math to two options:Evan Cheng2010-07-151-1/+1
* Improve 64-subtraction of immediates when parts of the immediate can fitJim Grosbach2010-07-141-0/+29
* Add support for NEON VMVN immediate instructions.Bob Wilson2010-07-141-0/+48
* Add an ARM-specific DAG combining to avoid redundant VDUPLANE nodes.Bob Wilson2010-07-141-0/+12
* Use a target-specific VMOVIMM DAG node instead of BUILD_VECTOR to representBob Wilson2010-07-131-1/+1
* Extend the r107852 optimization which turns some fp compare to code sequence ...Evan Cheng2010-07-131-9/+62
* Fix va_arg for doubles. With this patch VAARG nodes always contain theRafael Espindola2010-07-111-1/+23
* In the presence of variable sized objects, allocate an emergency spill slot.Jim Grosbach2010-07-091-2/+2
* Fix test to be less sensitive of regalloc accidentsJakob Stoklund Olesen2010-07-091-1/+1
* Print "dregpair" NEON operands with a space between them, for readability andBob Wilson2010-07-091-2/+2
* Reenable DAG combining for vector shuffles. It looks like it was temporarilyBob Wilson2010-07-092-10/+12
* Check for FiniteOnlyFPMath as well.Evan Cheng2010-07-081-1/+1
* r107852 is only safe with -enable-unsafe-fp-math to account for +0.0 == -0.0.Evan Cheng2010-07-081-1/+1
* Optimize some vfp comparisons to integer ones. This patch implements the simp...Evan Cheng2010-07-081-0/+29
* Changes to ARM tail calls, mostly cosmetic.Dale Johannesen2010-07-081-2/+11
* Don't create neon moves in CopyRegToReg. NEONMoveFixPass will do the conversionRafael Espindola2010-07-061-1/+1
* Fix incorrect asm-printing of some NEON immediates. Fix weak testcase soBob Wilson2010-07-021-34/+20
* Implement the "linker_private_weak" linkage type. This will be used forBill Wendling2010-07-011-1/+1
* Fix the handling of partial redefines in the fast register allocator.Jakob Stoklund Olesen2010-06-291-0/+22
* Fix a register scavenger crash when dealing with undefined subregs.Bob Wilson2010-06-291-0/+15
* Add a VT argument to getMinimalPhysRegClass and replace the copy related usesRafael Espindola2010-06-291-1/+1
* Unlike other targets, ARM now uses BUILD_VECTORs post-legalization so theyBob Wilson2010-06-281-0/+10
* When splitting a VAARG, remember its alignment.Rafael Espindola2010-06-261-0/+19
* Thumb2ITBlockPass: Fix a possible dereference of an invalid iterator. This wasDaniel Dunbar2010-06-251-0/+75
* Change if-conversion block size limit checks to add some flexibility.Evan Cheng2010-06-251-1/+1
* Teach EmitLiveInCopies to omit copies for unused virtual registers,Dan Gohman2010-06-241-4/+4