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	Commit message (Expand)	Author	Age	Files	Lines
*	[fast-isel] Fallback to SelectionDAG isel if we require strict alignment for	Chad Rosier	2012-09-21	1	-0/+36
*	llvm/test/CodeGen/ARM/fast-isel.ll: Fix possible typos, s/@unaligned_i16_stor...	NAKAMURA Takumi	2012-09-21	1	-2/+2
*	Testcase does not need to be this strict.	Chad Rosier	2012-09-21	1	-1/+1
*	Add newline.	Chad Rosier	2012-09-21	1	-1/+1
*	[fast-isel] Fallback to SelectionDAG isel if we require strict alignment for	Chad Rosier	2012-09-21	1	-0/+30
*	ARM: Use a dedicated intrinsic for vector bitwise select.	Jim Grosbach	2012-09-21	1	-0/+49
*	Ignore PHI-defs for -new-coalescer interference checks.	Jakob Stoklund Olesen	2012-09-20	1	-0/+48
*	Try to make these tests more portable.	Evan Cheng	2012-09-20	3	-7/+7
*	Resolve conflicts involving dead vector lanes for -new-coalescer.	Jakob Stoklund Olesen	2012-09-19	1	-0/+27
*	MOVi16 (movw) is only legal on cpus with V6T2 support. rdar://12300648	Evan Cheng	2012-09-18	2	-1/+12
*	More domain conversion; convert VFP VMOVS to NEON instructions in more cases ...	James Molloy	2012-09-18	1	-2/+18
*	Use vld1 / vst2 for unaligned v2f64 load / store. e.g. Use vld1.16 for 2-byte	Evan Cheng	2012-09-18	8	-46/+549
*	Merge into undefined lanes under -new-coalescer.	Jakob Stoklund Olesen	2012-09-17	1	-1/+49
*	Removed the VMLxForwarding feature for the Cortex-A15 target.	Silviu Baranga	2012-09-17	1	-0/+12
*	This patch introduces A15 as a target in LLVM.	Silviu Baranga	2012-09-13	1	-0/+6
*	Fix constant folding through bitcasts by no longer relying on undefined behav...	Kristof Beyls	2012-09-12	1	-0/+10
*	Don't attempt to use flags from predicated instructions.	Jakob Stoklund Olesen	2012-09-10	1	-0/+21
*	Fix an assertion failure when optimising a shufflevector incorrectly into con...	James Molloy	2012-09-10	1	-0/+10
*	Set operation action for FFLOOR to Expand for all vector types for X86. Set F...	Craig Topper	2012-09-08	1	-0/+31
*	Improve codegen for BUILD_VECTORs on ARM.	James Molloy	2012-09-06	1	-0/+34
*	Optimize codegen for VSETLNi{8,16,32} operating on Q registers. Degenerate to...	James Molloy	2012-09-06	2	-1/+36
*	Use predication instead of pseudo-opcodes when folding into MOVCC.	Jakob Stoklund Olesen	2012-09-05	2	-8/+8
*	Strip old MachineInstrs after we know we can put them back.	Tim Northover	2012-09-05	1	-1/+21
*	Fixed the DAG combiner to better handle the folding of AND nodes for vector t...	Silviu Baranga	2012-09-05	1	-0/+11
*	Patch to implement UMLAL/SMLAL instructions for the ARM architecture	Arnold Schwaighofer	2012-09-04	1	-0/+44
*	Not all targets have efficient ISel code generation for select instructions.	Nadav Rotem	2012-09-02	1	-3/+2
*	Generate better select code by allowing the target to use scalar select, and ...	Nadav Rotem	2012-09-02	1	-0/+2
*	Teach DAG combine a number of tricks to simplify FMA expressions in fast-math...	Owen Anderson	2012-09-01	1	-0/+60
*	Fix a couple of typos in EmitAtomic.	Jakob Stoklund Olesen	2012-08-31	1	-0/+10
*	Currently targets that do not support selects with scalar conditions and vect...	Nadav Rotem	2012-08-30	1	-0/+17
*	Add support for moving pure S-register to NEON pipeline if desired	Tim Northover	2012-08-30	1	-0/+64
*	[arm-fast-isel] Add support for ARM PIC.	Jush Lu	2012-08-29	1	-0/+43
*	Make sure we add the predicate after all of the registers are added.	Bill Wendling	2012-08-27	1	-0/+129
*	Rejected 169195. As Duncan commented, bitcasting to proper type is wrong appr...	Stepan Dyatkovskiy	2012-08-22	1	-10/+0
*	Add correct set of regression tests for r162094 commit.	Tim Northover	2012-08-21	1	-33/+33
*	Add a missing def flag.	Jakob Stoklund Olesen	2012-08-21	1	-1/+1
*	Don't add CFG edges for redundant conditional branches.	Jakob Stoklund Olesen	2012-08-20	1	-1/+1
*	Forget to add testcase for r162195. Sorry.	Stepan Dyatkovskiy	2012-08-20	1	-0/+10
*	Also combine zext/sext into selects for ARM.	Jakob Stoklund Olesen	2012-08-18	1	-0/+32
*	Also pass logical ops to combineSelectAndUse.	Jakob Stoklund Olesen	2012-08-18	1	-8/+8
*	Avoid folding ADD instructions with FI operands.	Jakob Stoklund Olesen	2012-08-17	1	-0/+11
*	Implement NEON domain switching for scalar <-> S-register vmovs on ARM	Tim Northover	2012-08-17	1	-32/+32
*	Add ADD and SUB to the predicable ARM instructions.	Jakob Stoklund Olesen	2012-08-16	2	-12/+26
*	[arm-fast-isel] Add support for fastcc.	Jush Lu	2012-08-16	1	-0/+66
*	Fold predicable instructions into MOVCC / t2MOVCC.	Jakob Stoklund Olesen	2012-08-15	1	-0/+60
*	Rework test so that it reproduces the error without the horrible flag.	Bill Wendling	2012-08-15	1	-8/+2
*	Use vld1/vst1 to load/store f64 if alignment is < 4 and the target allows una...	Evan Cheng	2012-08-15	1	-17/+49
*	The names of VFP variants of half-to-float conversion instructions were	Anton Korobeynikov	2012-08-14	1	-3/+3
*	During the CodeGenPrepare we often lower intrinsics (such as objsize)	Nadav Rotem	2012-08-14	1	-6/+7
*	llvm/test/CodeGen/ARM/floorf.ll: Add explicit -mtriple=arm-unknown-unknown, o...	NAKAMURA Takumi	2012-08-14	1	-1/+1