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* more tests not making the jump into the brave new world.Chris Lattner2011-07-091-19/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134820 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove support for parsing the "type i32" syntax for defining a numberedChris Lattner2011-06-192-2/+2
| | | | | | | | | top level type without a specified number. This syntax isn't documented and blocks forward progress. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133371 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't completely eliminate identity copies that also modify super register ↵Jakob Stoklund Olesen2011-03-311-0/+1
| | | | | | | | | liveness. Turn them into noop KILL instructions instead. This lets the scavenger know when super-registers are killed and defined. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128645 91177308-0d34-0410-b5e6-96231b3b80d8
* Be nice to Xcore and the XMOS assembler and avoid quoting section namesJoerg Sonnenberger2011-03-041-1/+1
| | | | | | | that contain only letters, digits and the characters "_" and ".". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127028 91177308-0d34-0410-b5e6-96231b3b80d8
* Bug#9033: For the ELF assembler output, always quote the section name.Joerg Sonnenberger2011-03-031-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126963 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove TargetInstrInfo::copyRegToReg entirely.Jakob Stoklund Olesen2010-07-111-2/+2
| | | | | | | Targets must now implement TargetInstrInfo::copyPhysReg instead. There is no longer a default implementation forwarding to copyRegToReg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108095 91177308-0d34-0410-b5e6-96231b3b80d8
* Start function numbering at 0.Dan Gohman2010-04-171-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101638 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the scheduler from adding nodes in allnodes orderChris Lattner2010-02-241-2/+1
| | | | | | | | | | | | | | | | | | | to adding them in a determinstic order (bottom up from the root) based on the structure of the graph itself. This updates tests for some random changes, interesting bits: CodeGen/Blackfin/promote-logic.ll no longer crashes. I have no idea why, but that's good right? CodeGen/X86/2009-07-16-LoadFoldingBug.ll also fails, but now compiles to have one fewer constant pool entry, making the expected load that was being folded disappear. Since it is an unreduced mass of gnast, I just removed it. This fixes PR6370 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97023 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach dag combine to fold the following transformation more aggressively:Evan Cheng2010-01-062-1/+1
| | | | | | | | | | | (OP (trunc x), (trunc y)) -> (trunc (OP x, y)) Unfortunately this simple change causes dag combine to infinite looping. The problem is the shrink demanded ops optimization tend to canonicalize expressions in the opposite manner. That is badness. This patch disable those optimizations in dag combine but instead it is done as a late pass in sdisel. This also exposes some deficiencies in dag combine and x86 setcc / brcond lowering. Teach them to look pass ISD::TRUNCATE in various places. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92849 91177308-0d34-0410-b5e6-96231b3b80d8
* Delete useless trailing semicolons.Dan Gohman2010-01-055-15/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92740 91177308-0d34-0410-b5e6-96231b3b80d8
* Move Blackfin intrinsics into the Target/Blackfin directory.Jakob Stoklund Olesen2009-10-151-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84194 91177308-0d34-0410-b5e6-96231b3b80d8
* Coalescer should not delete extract_subreg, insert_subreg, and subreg_to_reg ofEvan Cheng2009-09-281-1/+0
| | | | | | | | | | | | physical registers. This is especially critical for the later two since they start the live interval of a super-register. e.g. %DO<def> = INSERT_SUBREG %D0<undef>, %S0<kill>, 1 If this instruction is eliminated, the register scavenger will not be happy as D0 is not defined previously. This fixes PR5055. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82968 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-0953-53/+53
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8
* Add XFAIL testcase for setcc undef.Jakob Stoklund Olesen2009-08-151-0/+17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79093 91177308-0d34-0410-b5e6-96231b3b80d8
* Add XFAIL test case for a scavenger assert.Jakob Stoklund Olesen2009-08-151-0/+20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79092 91177308-0d34-0410-b5e6-96231b3b80d8
* Update LocalRewriter::DistanceMap when inserting stack loads.Jakob Stoklund Olesen2009-08-151-0/+25
| | | | | | | | In the included test case, a stack load was not included in DistanceMap. That caused TransferDeadness to ignore the instruction, leading to a scavenger assert. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79090 91177308-0d34-0410-b5e6-96231b3b80d8
* Rebuild RegScavenger::DistanceMap each time it is needed.Jakob Stoklund Olesen2009-08-111-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The register scavenger maintains a DistanceMap that maps MI pointers to their distance from the top of the current MBB. The DistanceMap is built incrementally in forward() and in bulk in findFirstUse(). It is used by scavengeRegister() to determine which candidate register has the longest unused interval. Unfortunately the DistanceMap contents can become outdated. The first time scavengeRegister() is called, the DistanceMap is filled to cover the MBB. If then instructions are inserted in the MBB (as they always are following scavengeRegister()), the recorded distances are too short. This causes bad behaviour in the included test case where a register use /after/ the current position is ignored because findFirstUse() thinks is is /before/ the current position. A "using an undefined register" assertion follows promptly. The fix is to build a fresh DistanceMap at the top of scavengeRegister(), and discard it after use. This means that DistanceMap is no longer needed as a RegScavenger member variable, and forward() doesn't need to update it. The fix then discloses issue number two in the same test case: The candidate search in scavengeRegister() finds a CSR that has been saved in the prologue, but is currently unused. It would be both inefficient and wrong to spill such a register in the emergency spill slot. In the present case, the emergency slot restore is placed immediately before the normal epilogue restore, leading to a "Redefining a live register" assertion. Fix number two: When scavengerRegister() stumbles upon an unused register that is overwritten later in the MBB, return that register early. It is important to verify that the register is defined later in the MBB, otherwise it might be an unspilled CSR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78650 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for READCYCLECOUNTER in Blackfin back-end.Jakob Stoklund Olesen2009-08-081-5/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78506 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't build illegal ops in DAGCombiner::SimplifyBinOpWithSameOpcodeHands().Jakob Stoklund Olesen2009-08-081-2/+2
| | | | | | | | Blackfin supports and/or/xor on i32 but not on i16. Teach DAGCombiner::SimplifyBinOpWithSameOpcodeHands to not produce illegal nodes after legalize ops. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78497 91177308-0d34-0410-b5e6-96231b3b80d8
* Turn some insert_subreg, extract_subreg, subreg_to_reg into implicit_defs.Evan Cheng2009-08-051-3/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78151 91177308-0d34-0410-b5e6-96231b3b80d8
* LowerSubregsInstructionPass::LowerExtract should not extend the live range ↵Jakob Stoklund Olesen2009-08-041-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | of registers. When LowerExtract eliminates an EXTRACT_SUBREG with a kill flag, it moves the kill flag to the place where the sub-register is killed. This can accidentally overlap with the use of a sibling sub-register, and we have trouble. In the test case we have this code: Live Ins: %R0 %R1 %R2 %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1 %R2H<def> = LOAD16fi <fi#-1>, 0, Mem:LD(2,4) [FixedStack-1 + 0] %R1L<def> = EXTRACT_SUBREG %R1<kill>, 1 %R0L<def> = EXTRACT_SUBREG %R0<kill>, 1 %R0H<def> = ADD16 %R2H<kill>, %R2L<kill>, %AZ<imp-def>, %AN<imp-def>, %AC0<imp-def>, %V<imp-def>, %VS<imp-def> subreg: CONVERTING: %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1 subreg: eliminated! subreg: killed here: %R0H<def> = ADD16 %R2H, %R2L, %R2<imp-use,kill>, %AZ<imp-def>, %AN<imp-def>, %AC0<imp-def>, %V<imp-def>, %VS<imp-def> The kill flag on %R2 is moved to the last instruction, and the live range overlaps with the definition of %R2H: *** Bad machine code: Redefining a live physical register *** - function: f - basic block: 0x18358c0 (#0) - instruction: %R2H<def> = LOAD16fi <fi#-1>, 0, Mem:LD(2,4) [FixedStack-1 + 0] Register R2H was defined but already live. The fix is to replace EXTRACT_SUBREG with IMPLICIT_DEF instead of eliminating it completely: subreg: CONVERTING: %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1 subreg: replace by: %R2L<def> = IMPLICIT_DEF %R2<kill> Note that these IMPLICIT_DEF instructions survive to the asm output. It is necessary to fix the stack-color-with-reg test case because of that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78093 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unneeded intrinsics from Blackfin backend.Jakob Stoklund Olesen2009-08-021-13/+0
| | | | | | | | | | __builtin_bfin_ones does the same as ctpop, so it can be implemented in the front-end. __builtin_bfin_loadbytes loads from an unaligned pointer with the disalignexcpt instruction. It does the same as loading from a pointer with the low bits masked. It is better if the front-end creates a masked load. We can always instruction select the masked to disalignexcpt+load. We keep csync/ssync/idle. These intrinsics represent instructions that need workarounds for some silicon revisions. We may even want to convert inline assembler to intrinsics to enable the workarounds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77917 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix issue in regscavenger when scavenging a callee-saved register that has ↵Jakob Stoklund Olesen2009-08-021-3/+3
| | | | | | not been spilled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77912 91177308-0d34-0410-b5e6-96231b3b80d8
* Never add a kill flag to a constrained physical register in a two-addr ↵Jakob Stoklund Olesen2009-08-022-6/+0
| | | | | | instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77906 91177308-0d34-0410-b5e6-96231b3b80d8
* Scavenger asserts.Jakob Stoklund Olesen2009-08-021-3/+0
| | | | | | | Allow imp-def and imp-use of anything in the scavenger asserts, just like the machine code verifier. Allow redefinition of a sub-register of a live register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77904 91177308-0d34-0410-b5e6-96231b3b80d8
* Add some basic blackfin intrinsics.Jakob Stoklund Olesen2009-08-022-0/+29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77903 91177308-0d34-0410-b5e6-96231b3b80d8
* Inline assembly support for Blackfin.Jakob Stoklund Olesen2009-08-021-0/+38
| | | | | | We use the same constraints as GCC, including those that are slightly insane for inline assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77899 91177308-0d34-0410-b5e6-96231b3b80d8
* Analog Devices Blackfin back-end.Jakob Stoklund Olesen2009-08-0247-0/+1238
Generate code for the Blackfin family of DSPs from Analog Devices: http://www.analog.com/en/embedded-processing-dsp/blackfin/processors/index.html We aim to be compatible with the exsisting GNU toolchain found at: http://blackfin.uclinux.org/gf/project/toolchain The back-end is experimental. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77897 91177308-0d34-0410-b5e6-96231b3b80d8
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