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path: root/test/CodeGen/Mips/i64arg.ll
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* [mips] Make sure there is a chain edge dependency between loads that readAkira Hatanaka2013-11-091-7/+7
* [mips] Make sure loads from lazy-binding entries do not get CSE'd or hoisted outAkira Hatanaka2013-09-281-5/+5
* [mips] Implement MipsTargetMachine::getInstrItineraryData().Akira Hatanaka2013-07-121-6/+6
* [mips] Print move instructions.Akira Hatanaka2013-03-041-6/+6
* [mips] Implement MipsRegisterInfo::getRegPressureLimit.Akira Hatanaka2013-01-221-1/+1
* [mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copyAkira Hatanaka2012-12-201-6/+6
* Eliminate the stack slot used to save the global base register.Akira Hatanaka2012-07-251-2/+2
* Fix test cases.Akira Hatanaka2012-06-141-2/+2
* Change the default scheduler from Latency to ILP, since LatencyDan Gohman2011-10-241-4/+4
* Fix test cases.Akira Hatanaka2011-09-091-1/+1
* Change the chain input of nodes that load the address of a function. This changeAkira Hatanaka2011-06-241-2/+2
* Make $fp and $ra callee-saved registers and let PrologEpilogInserter handleAkira Hatanaka2011-05-201-2/+2
* Fix bug in which nodes that write to argument registers do not get glued with...Akira Hatanaka2011-05-201-5/+5
* Align i64 arguments to 64 bit boundaries.Akira Hatanaka2011-05-191-0/+34