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* Update to LLVM 3.5a.Stephen Hines2014-04-241-84/+84
* [mips][msa] Added support for matching bmnz, bmnzi, bmz, and bmzi from normal...Daniel Sanders2013-10-301-122/+214
* [mips][msa] MSA requires FR=1 mode (64-bit FPU register file). Report fatal e...Daniel Sanders2013-09-271-2/+2
* [mips][msa] Added support for matching bsel and bseli from normal IR (i.e. no...Daniel Sanders2013-09-241-5/+5
* [mips][msa] Added support for matching and, or, and xor from normal IR (i.e. ...Daniel Sanders2013-09-231-0/+198
* [mips][msa] Summarize testsDaniel Sanders2013-08-281-2/+2
* [mips][msa] Added tests for and.v, bmnz.v, bmz.v, bsel.v, nor.v, or.v, xor.v ...Daniel Sanders2013-08-271-43/+523
* [mips][msa] Added and.v, bmnz.v, bmz.v, bsel.v, nor.v, or.v, xor.vDaniel Sanders2013-08-201-0/+176