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* add newlines at the end of files.Chris Lattner2010-04-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100705 91177308-0d34-0410-b5e6-96231b3b80d8
* Split big test into multiple directories to cater toDale Johannesen2010-04-071-0/+33
| | | | | | | | those who don't build all targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100688 91177308-0d34-0410-b5e6-96231b3b80d8
* After trivial coalescing, the MI being visited may have become a copy. Avoid ↵Evan Cheng2010-04-021-0/+70
| | | | | | | | | adding it to CSE hash table since copies aren't being considered for CSE and they may be deleted. rdar://7819990 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100170 91177308-0d34-0410-b5e6-96231b3b80d8
* add some nounwindsChris Lattner2010-03-281-12/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99752 91177308-0d34-0410-b5e6-96231b3b80d8
* this takes an insane amount of time to run, disable it for now (PR6727)Chris Lattner2010-03-281-1/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99751 91177308-0d34-0410-b5e6-96231b3b80d8
* Turn calls to copysignl into an FCOPYSIGN node. Handle FCOPYSIGN nodesDuncan Sands2010-03-141-0/+7
| | | | | | | | with ppc_f128 type by having the type legalizer turn these back into a call to copysignl. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98514 91177308-0d34-0410-b5e6-96231b3b80d8
* fix AsmPrinter::GetBlockAddressSymbol to always return a uniqueChris Lattner2010-03-141-4/+4
| | | | | | | | label instead of trying to form one based on the BB name (which causes collisions if the name is empty). This fixes PR6608 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98495 91177308-0d34-0410-b5e6-96231b3b80d8
* get MMI out of the label uniquing business, just go to MCContextChris Lattner2010-03-141-2/+2
| | | | | | | to get unique assembler temporary labels. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98489 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable machine cse pass.Evan Cheng2010-03-101-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98132 91177308-0d34-0410-b5e6-96231b3b80d8
* The address of an indirect call must be in R12 on Darwin.Dale Johannesen2010-03-091-0/+19
| | | | | | | | | | Make it so. (This patch is in LowerCall_Darwin, which seems to be used by SVR4 code as well; since that doesn't belong here, I haven't worried about this case.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98077 91177308-0d34-0410-b5e6-96231b3b80d8
* add some random nounwinds.Chris Lattner2010-02-281-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97411 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the right floating point load/store instructions in ↵Jakob Stoklund Olesen2010-02-261-0/+433
| | | | | | | | | | | | | | | | | | PPCInstrInfo::foldMemoryOperandImpl(). The PowerPC floating point registers can represent both f32 and f64 via the two register classes F4RC and F8RC. F8RC is considered a subclass of F4RC to allow cross-class coalescing. This coalescing only affects whether registers are spilled as f32 or f64. Spill slots must be accessed with load/store instructions corresponding to the class of the spilled register. PPCInstrInfo::foldMemoryOperandImpl was looking at the instruction opcode which is wrong. X86 has similar floating point register classes, but doesn't try to fold memory operands, so there is no problem there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97262 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the scheduler from adding nodes in allnodes orderChris Lattner2010-02-241-2/+2
| | | | | | | | | | | | | | | | | | | to adding them in a determinstic order (bottom up from the root) based on the structure of the graph itself. This updates tests for some random changes, interesting bits: CodeGen/Blackfin/promote-logic.ll no longer crashes. I have no idea why, but that's good right? CodeGen/X86/2009-07-16-LoadFoldingBug.ll also fails, but now compiles to have one fewer constant pool entry, making the expected load that was being folded disappear. Since it is an unreduced mass of gnast, I just removed it. This fixes PR6370 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97023 91177308-0d34-0410-b5e6-96231b3b80d8
* When emitting an instruction which depends on both a post-incrementedDan Gohman2010-02-221-0/+32
| | | | | | | | | | induction variable value and a loop-variant value, don't force the insert position to be at the post-increment position, because it may not be dominated by the loop-variant value. This fixes a use-before-def problem noticed on PPC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96774 91177308-0d34-0410-b5e6-96231b3b80d8
* add some no-unwinds, other minor cleanups.Chris Lattner2010-02-213-30/+30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96756 91177308-0d34-0410-b5e6-96231b3b80d8
* add a triple so that this doesn't fail due to linux/ppc register printing Chris Lattner2010-02-211-1/+1
| | | | | | | syntax. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96748 91177308-0d34-0410-b5e6-96231b3b80d8
* filecheckize and add nouwinds.Chris Lattner2010-02-211-9/+16
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* Make g5 target explicit; scheduling affects register choice.Dale Johannesen2010-02-161-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96413 91177308-0d34-0410-b5e6-96231b3b80d8
* Adjust register numbers in tests to compensate for theDale Johannesen2010-02-164-14/+14
| | | | | | | | new lack of R2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96407 91177308-0d34-0410-b5e6-96231b3b80d8
* When save/restoring CR at prolog/epilog, in a largeDale Johannesen2010-02-121-0/+30
| | | | | | | | | | | | | | | | | | | stack frame, the prolog/epilog code was using the same register for the copy of CR and the address of the save slot. Oops. This is fixed here for Darwin, sort of, by reserving R2 for this case. A better way would be to do the store before the decrement of SP, which is safe on Darwin due to the red zone. SVR4 probably has the same problem, but I don't know how to fix it; there is no red zone and R2 is already used for something else. I'm going to leave it to someone interested in that target. Better still would be to rewrite the CR-saving code completely; spilling each CR subregister individually is horrible code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96015 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix alignment on ppc linux. This fixes the build of crtend.oRafael Espindola2010-02-061-9/+40
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95477 91177308-0d34-0410-b5e6-96231b3b80d8
* Make test more fucused eliminating extraneous bits.Bill Wendling2010-02-051-44/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95384 91177308-0d34-0410-b5e6-96231b3b80d8
* An empty global constant (one of size 0) may have a section immediatelyBill Wendling2010-02-051-0/+50
| | | | | | | | | | | | following it. However, the EmitGlobalConstant method wasn't emitting a body for the constant. The assembler doesn't like that. Before, we were generating this: .zerofill __DATA, __common, __cmd, 1, 3 This fix puts us back to that semantic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95336 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply 95050 with a tweak to check the register class.Dale Johannesen2010-02-031-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95183 91177308-0d34-0410-b5e6-96231b3b80d8
* Test revert 95050; there's a good chance it's causingDale Johannesen2010-02-021-2/+2
| | | | | | | | buildbot failure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95103 91177308-0d34-0410-b5e6-96231b3b80d8
* Make local RA smarter about reusing input register of a copyDale Johannesen2010-02-021-2/+2
| | | | | | | | | as output. Needed for (functional) correctness in inline asm, and should be generally beneficial. 7361612. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95050 91177308-0d34-0410-b5e6-96231b3b80d8
* Give AsmPrinter the most common expected implementation of Chris Lattner2010-01-281-1/+1
| | | | | | | | | | runOnMachineFunction, and switch PPC to use EmitFunctionBody. The two ppc asmprinters now don't heave to define runOnMachineFunction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94722 91177308-0d34-0410-b5e6-96231b3b80d8
* Attempt to unbreak test on Linux. Chris, please check.Daniel Dunbar2010-01-251-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94399 91177308-0d34-0410-b5e6-96231b3b80d8
* stop testing for invalid output.Chris Lattner2010-01-231-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94288 91177308-0d34-0410-b5e6-96231b3b80d8
* testcase for r94095Chris Lattner2010-01-211-0/+22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94096 91177308-0d34-0410-b5e6-96231b3b80d8
* Now that we have everything nicely factored (e.g. asmprinter is notChris Lattner2010-01-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | doing global variable classification anymore) and hookized, sink almost all target targets global variable emission code into AsmPrinter and out of each target. Some notes: 1. PIC16 does completely custom and crazy stuff, so it is not changed. 2. XCore has some custom handling for extra directives. I'll look at it next. 3. This switches linux/ppc to use .globl instead of .global. If .globl is actually wrong, let me know and I'll fix it. 4. This makes linux/ppc get a lot of random cases right which were obviously wrong before, it is probably now a bit healthier. 5. Blackfin will probably start getting .comm and other things that it didn't before. If this is undesirable, it should explicitly opt out of these things by clearing the relevant fields of MCAsmInfo. This leads to a nice diffstat: 14 files changed, 127 insertions(+), 830 deletions(-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93858 91177308-0d34-0410-b5e6-96231b3b80d8
* remove uses of deprecated functions, this generates slightlyChris Lattner2010-01-131-4/+4
| | | | | | | | | | different BlockAddress labels, but nothing semantically important. Add a FIXME that BlockAddress codegen is broken if the LLVM BB has an empty name (e.g. strip was run). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93303 91177308-0d34-0410-b5e6-96231b3b80d8
* Delete useless trailing semicolons.Dan Gohman2010-01-051-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92740 91177308-0d34-0410-b5e6-96231b3b80d8
* Do better with physical reg operands (typically, from inline asm)Dale Johannesen2009-12-161-2/+2
| | | | | | | | | | | | | | | | | | | | in local register allocator. If a reg-reg copy has a phys reg input and a virt reg output, and this is the last use of the phys reg, assign the phys reg to the virt reg. If a reg-reg copy has a phys reg output and we need to reload its spilled input, reload it directly into the phys reg than passing it through another reg. Following 76208, there is sometimes no dependency between the def of a phys reg and its use; this creates a window where that phys reg can be used for spilling (this is true in linear scan also). This is bad and needs to be fixed a better way, although 76208 works too well in practice to be reverted. However, there should normally be no spilling within inline asm blocks. The patch here goes a long way towards making this actually be true. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91485 91177308-0d34-0410-b5e6-96231b3b80d8
* ProcessImplicitDefs should watch out for invalidated iterator and extra ↵Evan Cheng2009-11-251-0/+56
| | | | | | implicit operands on copies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89880 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not store R31 into the caller's link area on PPC.Dale Johannesen2009-11-244-26/+26
| | | | | | | | | | | | | | This violates the ABI (that area is "reserved"), and while it is safe if all code is generated with current compilers, there is some very old code around that uses that slot for something else, and breaks if it is stored into. Adjust testcases looking for current behavior. I've verified that the stack frame size is right in all testcases, whether it changed or not. 7311323. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89811 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix for bad FileCheck converts in revision 89584.Edward O'Callaghan2009-11-221-13/+9
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* Convert a few tests to FileCheck for PR5307.Edward O'Callaghan2009-11-221-8/+18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89584 91177308-0d34-0410-b5e6-96231b3b80d8
* When generating a vector the really slow way, via loadsDale Johannesen2009-11-211-0/+37
| | | | | | | | | and stores, handle the case where the element size is not a valid target type correctly (PPC). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89521 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove an incorrect overaggressive optimizationDale Johannesen2009-11-201-0/+28
| | | | | | | | (PPC specific). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89496 91177308-0d34-0410-b5e6-96231b3b80d8
* Check if subreg index is zero.Evan Cheng2009-11-161-0/+155
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88899 91177308-0d34-0410-b5e6-96231b3b80d8
* For some targets, a copy can use a register multiple times, e.g. ppc.Evan Cheng2009-11-161-0/+105
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88895 91177308-0d34-0410-b5e6-96231b3b80d8
* Adjust isConstantSplat to allow for big-endian targets.Dale Johannesen2009-11-131-0/+24
| | | | | | | | PPC is such a target; make it work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87060 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix test to work on every platform.Bill Wendling2009-11-111-3/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86786 91177308-0d34-0410-b5e6-96231b3b80d8
* Test this on Darwin only.Bill Wendling2009-11-101-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86752 91177308-0d34-0410-b5e6-96231b3b80d8
* Emit correct code when making a ConstantPool entry for a vectorDale Johannesen2009-11-101-0/+36
| | | | | | | | | | | constant whose component type is not a legal type for the target. (If the target ConstantPool cannot handle this type either, it has an opportunity to merge elements. In practice any target with 8-bit bytes must support i8 *as data*). 7320806 (partial). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86751 91177308-0d34-0410-b5e6-96231b3b80d8
* Modify how the prologue encoded the "move" information for the FDE. GCCBill Wendling2009-11-101-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | generates a sequence similar to this: __Z4funci: LFB2: mflr r0 LCFI0: stmw r30,-8(r1) LCFI1: stw r0,8(r1) LCFI2: stwu r1,-80(r1) LCFI3: mr r30,r1 LCFI4: where LCFI3 and LCFI4 are used by the FDE to indicate what the FP, LR, and other things are. We generated something more like this: Leh_func_begin1: mflr r0 stw r31, 20(r1) stw r0, 8(r1) Llabel1: stwu r1, -80(r1) Llabel2: mr r31, r1 Note that we are missing the "mr" instruction. This patch makes it more like the GCC output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86729 91177308-0d34-0410-b5e6-96231b3b80d8
* Update these tests for the new label names.Dan Gohman2009-11-051-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86192 91177308-0d34-0410-b5e6-96231b3b80d8
* Add -mtriple to llc commands, attempting to fix buildbot failures.Bob Wilson2009-11-051-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86086 91177308-0d34-0410-b5e6-96231b3b80d8
* Add PowerPC codegen for indirect branches.Bob Wilson2009-11-041-0/+55
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86050 91177308-0d34-0410-b5e6-96231b3b80d8
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