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Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
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Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
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Includes a cherry-pick of:
r212948 - fixes a small issue with atomic calls
Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
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Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
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r195879 | tstellar | 2013-11-27 13:23:29 -0800 (Wed, 27 Nov 2013) | 6 lines
R600/SI: Use SGPR_32 register class for 32-bit SMRD outputs
Writing to the M0 register from an SMRD instruction hangs the GPU, so
we need to use the SGPR_32 register class, which does not include M0.
NOTE: This is a candidate for the 3.4 branch.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195999 91177308-0d34-0410-b5e6-96231b3b80d8
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