external_llvm.git - Unnamed repository; edit this file 'description' to name the repository.

	Commit message (Expand)	Author	Age	Files	Lines
*	R600: Fix calculation of stack offset in AMDGPUFrameLowering	Tom Stellard	2013-06-07	1	-0/+33
*	R600: Fix the fetch limits for R600 generation GPUs	Tom Stellard	2013-06-07	2	-0/+129
*	R600: Add a pass that merge Vector Register	Vincent Lejeune	2013-06-05	1	-0/+30
*	R600: Schedule copy from phys register at beginning of block	Vincent Lejeune	2013-06-05	10	-10/+10
*	R600: Make sure to schedule AR register uses and defs in the same clause	Tom Stellard	2013-06-05	1	-0/+32
*	Revert "R600: Add a pass that merge Vector Register"	Rafael Espindola	2013-06-05	1	-30/+0
*	R600: Add a pass that merge Vector Register	Vincent Lejeune	2013-06-04	1	-0/+30
*	R600: Const/Neg/Abs can be folded to dot4	Vincent Lejeune	2013-06-04	1	-0/+27
*	R600: Swizzle texture/export instructions	Vincent Lejeune	2013-06-04	1	-5/+5
*	R600: Add a test for r183108	Vincent Lejeune	2013-06-04	1	-0/+2
*	R600/SI: Add support for work item and work group intrinsics	Tom Stellard	2013-06-03	1	-0/+211
*	R600/SI: Add a calling convention for compute shaders	Tom Stellard	2013-06-03	7	-10/+10
*	R600/SI: Custom lower i64 sign_extend	Tom Stellard	2013-06-03	1	-0/+12
*	R600/SI: Add support for global loads	Tom Stellard	2013-06-03	1	-3/+49
*	R600: use capital letter for PV channel	Vincent Lejeune	2013-06-03	14	-17/+17
*	R600: Fix R600ControlFlowFinalizer not considering VTX_READ 128 bit dst reg	Tom Stellard	2013-05-23	1	-0/+22
*	R600: Fix rotr.ll on non-asserts builds	Tom Stellard	2013-05-20	1	-6/+2
*	R600/SI: Add pattern for rotr	Tom Stellard	2013-05-20	1	-9/+19
*	R600: Swap the legality of rotl and rotr	Tom Stellard	2013-05-20	1	-0/+29
*	R600/SI: Add patterns for 64-bit shift operations	Tom Stellard	2013-05-20	1	-0/+3
*	R600: Lower int_load_input to copyFromReg instead of Register node	Vincent Lejeune	2013-05-17	1	-0/+121
*	R600: Use bottom up scheduling algorithm	Vincent Lejeune	2013-05-17	15	-17/+19
*	R600: Use depth first scheduling algorithm	Vincent Lejeune	2013-05-17	2	-2/+2
*	R600: Relax some vector constraints on Dot4.	Vincent Lejeune	2013-05-17	1	-1/+1
*	R600: Improve texture handling	Vincent Lejeune	2013-05-17	1	-16/+16
*	R600: Rename 128 bit registers.	Vincent Lejeune	2013-05-17	1	-16/+16
*	R600: Fix encoding for R600 family GPUs	Tom Stellard	2013-05-17	1	-0/+24
*	R600/SI: Add lit test coverage for the remaining patterns added recently	Michel Danzer	2013-05-14	6	-11/+111
*	R600: Remove AMDILPeeopholeOptimizer and replace optimizations with tablegen ...	Tom Stellard	2013-05-10	1	-0/+26
*	R600: Expand SUB for v2i32/v4i32	Tom Stellard	2013-05-10	1	-0/+15
*	R600: Expand MUL for v4i32/v2i32	Tom Stellard	2013-05-10	1	-0/+16
*	R600: Expand SRA for v4i32/v2i32	Tom Stellard	2013-05-10	1	-0/+13
*	R600: Expand vselect for v4i32 and v2i32	Tom Stellard	2013-05-10	1	-0/+17
*	R600/SI: Add lit tests for llvm.SI.imageload and llvm.SI.resinfo intrinsics	Michel Danzer	2013-05-08	2	-0/+197
*	R600: Emit config values in register / value pairs	Tom Stellard	2013-05-06	1	-2/+3
*	R600: Stop emitting the instruction type byte before each instruction	Tom Stellard	2013-05-06	2	-4/+4
*	R600: Emit ISA for CALL_FS_* instructions	Tom Stellard	2013-05-06	1	-0/+15
*	R600: Expand vector or, shl, srl, and xor nodes	Tom Stellard	2013-05-03	4	-0/+52
*	R600: Add pattern for SHA-256 Ma function	Tom Stellard	2013-05-03	1	-0/+18
*	R600: Signed literals are 64bits wide	Vincent Lejeune	2013-05-02	1	-0/+165
*	R600: If previous bundle is dot4, PV valid chan is always X	Vincent Lejeune	2013-05-02	1	-0/+244
*	R600: Add a test to check that use_kill is emitted	Vincent Lejeune	2013-05-02	1	-0/+1
*	R600: Prettier asmPrint of Alu	Vincent Lejeune	2013-05-02	34	-101/+127
*	TBAA: remove !tbaa from testing cases if not used.	Manman Ren	2013-04-30	1	-4/+1
*	R600: fix loop-address.ll test	Vincent Lejeune	2013-04-30	1	-2/+2
*	R600: use native for alu	Vincent Lejeune	2013-04-30	3	-5/+6
*	R600: Add FetchInst bit to instruction defs to denote vertex/tex instructions	Vincent Lejeune	2013-04-30	1	-2/+2
*	R600: Use correct CF_END instruction on Northern Island GPUs	Tom Stellard	2013-04-29	1	-2/+5
*	R600: Fix encoding of CF_END_{EG, R600} instructions	Tom Stellard	2013-04-29	1	-0/+6
*	R600: Initialize AMDGPUMachineFunction::ShaderType to ShaderType::COMPUTE	Tom Stellard	2013-04-26	1	-1/+3