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* Roll r127459 back in:Cameron Zwarich2011-03-111-2/+0
* Revert r127459, "Optimize trivial branches in CodeGenPrepare, which often getDaniel Dunbar2011-03-111-0/+2
* Optimize trivial branches in CodeGenPrepare, which often get created from theCameron Zwarich2011-03-111-2/+0
* Remove the rest of the *_sfp Neon instruction patterns.Bob Wilson2010-12-131-5/+0
* Avoiding overly aggressive latency scheduling. If the two nodes share anEvan Cheng2010-10-291-1/+1
* More accurate estimate / tracking of register pressure.Evan Cheng2010-10-201-1/+14
* Remove arm_apcscc from the test files. It is the default and doing thisRafael Espindola2010-06-171-1/+1
* - Clean up some crappy code which deals with coalescing of copies which look atEvan Cheng2010-04-211-1/+1
* Reapply coalescer fix for better cross-class coalescing.Jakob Stoklund Olesen2010-02-111-1/+1
* move fconst[sd] to UAL. <rdar://7414913>Jim Grosbach2009-11-231-1/+1
* Remat VLDRD from constpool. Clean up some instruction property specifications.Evan Cheng2009-11-201-1/+1
* Use Unified Assembly Syntax for the ARM backend.Jim Grosbach2009-11-091-1/+1
* Fix PR5367. QPR_8 is the super regclass of DPR_8 and SPR_8.Evan Cheng2009-11-031-1/+0
* Temporary xfail until PR5367 will be resolvedAnton Korobeynikov2009-11-031-0/+1
* vml[as].f32 cause stalls in following advanced SIMD instructions. Avoid usingJim Grosbach2009-10-311-1/+1
* Add a couple of ARM cross-rc coalescing tests.Evan Cheng2009-10-251-0/+67
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