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* switch the flag for using NEON for SP floating point to a subtarget 'feature'.Jim Grosbach2010-03-256-7/+7
* Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrmJohnny Chen2010-03-177-11/+11
* --- Reverse-merging r98637 into '.':Bob Wilson2010-03-167-11/+11
* Initial ARM/Thumb disassembler check-in. It consists of a tablgen backendJohnny Chen2010-03-167-11/+11
* Stop using the old pre-UAL syntax for LDM/STM instruction suffixes.Bob Wilson2010-03-162-3/+3
* Add a testcase for the change in r98586.Bob Wilson2010-03-161-0/+63
* Enable machine cse pass.Evan Cheng2010-03-101-4/+2
* Fix a crash compiling 254.gap for Thumb2. The Thumb2 add/sub with 12-bitBob Wilson2010-03-081-0/+266
* Drop the ".w" qualifier for t2UXTB16* instructions as there is no 16-bit versionJohnny Chen2010-03-041-10/+10
* Create a stack frame on ARM whenJakob Stoklund Olesen2010-02-241-0/+15
* LowerCall() should always do getCopyFromReg() to reference the stack pointer.Jim Grosbach2010-02-241-1/+1
* Last week we were generating code with duplicate induction variables in thisBob Wilson2010-02-151-0/+4
* Besides removing phi cycles that reduce to a single value, also remove deadBob Wilson2010-02-132-2/+40
* Reapply the new LoopStrengthReduction code, with compile time andDan Gohman2010-02-122-13/+17
* Add a new pass on machine instructions to optimize away PHI cycles that Bob Wilson2010-02-121-0/+34
* Reapply coalescer fix for better cross-class coalescing.Jakob Stoklund Olesen2010-02-111-1/+1
* Handle AddrMode6 (for NEON load/stores) in Thumb2's rewriteT2FrameIndex.Bob Wilson2010-02-061-2/+2
* Revert LoopStrengthReduce.cpp to pre-r94061 for now.Dan Gohman2010-01-222-17/+13
* Re-implement the main strength-reduction portion of LoopStrengthReduction.Dan Gohman2010-01-212-13/+17
* Remove predicates when changing an add into an unpredicable mov.Jakob Stoklund Olesen2010-01-191-0/+53
* Run the pre-register allocation tail duplication pass by default. RemoveBob Wilson2010-01-161-1/+1
* Add comments.Jakob Stoklund Olesen2010-01-071-0/+2
* Add Target hook to duplicate machine instructions.Jakob Stoklund Olesen2010-01-061-0/+87
* Delete useless trailing semicolons.Dan Gohman2010-01-051-8/+8
* Make this test pass on Linux.Nick Lewycky2009-12-161-9/+20
* Dynamic stack realignment use of sp register as source/dest registerAnton Korobeynikov2009-12-062-2/+2
* test case for IV-Users simplification loop improvementJim Grosbach2009-12-011-0/+128
* Enable predication of NEON instructions in Thumb2 mode.Evan Cheng2009-11-241-0/+29
* move fconst[sd] to UAL. <rdar://7414913>Jim Grosbach2009-11-231-1/+1
* update test for 89694Jim Grosbach2009-11-231-2/+2
* Miss two, PR5307.Edward O'Callaghan2009-11-222-6/+30
* Convert Thumb2 tests to FileCheck for PR5307.Edward O'Callaghan2009-11-2212-26/+130
* Revert 89562. We're being sneakier than I was giving us credit for, and thisJim Grosbach2009-11-212-2/+0
* Darwin requires a frame pointer for all non-leaf functions to support correctJim Grosbach2009-11-212-0/+2
* Enable hoisting load from constant memories.Evan Cheng2009-11-201-2/+6
* Remat VLDRD from constpool. Clean up some instruction property specifications.Evan Cheng2009-11-202-4/+2
* Also CSE non-pic load from constant pools.Evan Cheng2009-11-201-2/+11
* More consistent thumb1 asm printing.Evan Cheng2009-11-193-5/+5
* Shrink ldr / str [sp, imm0-1024] to 16-bit instructions.Evan Cheng2009-11-191-0/+6
* Enable arm jumpt table adjustment.Jim Grosbach2009-11-172-2/+1
* Forgot to commit test fixesAnton Korobeynikov2009-11-171-2/+2
* Convert to FileCheckJim Grosbach2009-11-175-13/+57
* Convert to FileCheckJim Grosbach2009-11-171-6/+8
* Cleanup. Missed removing these when converting. Oops.Jim Grosbach2009-11-171-5/+0
* Convert to FileCheckJim Grosbach2009-11-161-5/+18
* Convert to FileCheckJim Grosbach2009-11-161-5/+17
* Convert to FileCheckJim Grosbach2009-11-161-3/+7
* tbb opt off by defaultJim Grosbach2009-11-161-0/+1
* Detect need for autoalignment of the stack earlier to catch spills moreJim Grosbach2009-11-151-2/+3
* remove xfailJim Grosbach2009-11-141-2/+0
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