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* Update aosp/master LLVM for rebase to r235153Pirama Arumuga Nainar2015-05-181-1/+1
| | | | | Change-Id: I9bf53792f9fc30570e81a8d80d296c681d005ea7 (cherry picked from commit 0c7f116bb6950ef819323d855415b2f2b0aad987)
* Update LLVM for rebase to r212749.Stephen Hines2014-07-211-11/+30
| | | | | | | Includes a cherry-pick of: r212948 - fixes a small issue with atomic calls Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
* Update to LLVM 3.5a.Stephen Hines2014-04-241-1/+1
| | | | Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
* llvm/test/CodeGen/X86: Unmark them out of XFAIL:cygming, in atomic{32|64}.ll ↵NAKAMURA Takumi2013-04-021-2/+0
| | | | | | | | and handle-move.ll, corresponding to r178549. This reverts r176808, r176798, and r177914. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178583 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/test/CodeGen/X86/atomic{32|64}.ll: Unmark them out of XFAIL:win32.NAKAMURA Takumi2013-03-251-1/+1
| | | | | | | I know it is incorrect and they'd fail with +Asserts for win32 targets, though. I'll try to fix them tonight. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177914 91177308-0d34-0410-b5e6-96231b3b80d8
* Suppress atomic(32|64).ll as XFAIL on win32 codegen. Investigating.NAKAMURA Takumi2013-03-111-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176798 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR15355Michael Liao2013-03-061-1/+1
| | | | | | | | | | | | | | | - Clear 'mayStore' flag when loading from the atomic variable before the spin loop - Clear kill flag from one use to multiple use in registers forming the address to that atomic variable - don't use a physical register as live-in register in BB (neither entry nor landing pad.) by copying it into virtual register (patch by Cameron Zwarich) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176538 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-work X86 code generation of atomic ops with spin-loopMichael Liao2012-09-201-0/+216
- Rewrite/merge pseudo-atomic instruction emitters to address the following issue: * Reduce one unnecessary load in spin-loop previously the spin-loop looks like thisMBB: newMBB: ld t1 = [bitinstr.addr] op t2 = t1, [bitinstr.val] not t3 = t2 (if Invert) mov EAX = t1 lcs dest = [bitinstr.addr], t3 [EAX is implicit] bz newMBB fallthrough -->nextMBB the 'ld' at the beginning of newMBB should be lift out of the loop as lcs (or CMPXCHG on x86) will load the current memory value into EAX. This loop is refined as: thisMBB: EAX = LOAD [MI.addr] mainMBB: t1 = OP [MI.val], EAX LCMPXCHG [MI.addr], t1, [EAX is implicitly used & defined] JNE mainMBB sinkMBB: * Remove immopc as, so far, all pseudo-atomic instructions has all-register form only, there is no immedidate operand. * Remove unnecessary attributes/modifiers in pseudo-atomic instruction td * Fix issues in PR13458 - Add comprehensive tests on atomic ops on various data types. NOTE: Some of them are turned off due to missing functionality. - Revise tests due to the new spin-loop generated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164281 91177308-0d34-0410-b5e6-96231b3b80d8
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