Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Eliminate more uses of llvm-as and llvm-dis. | Dan Gohman | 2009-09-08 | 1 | -1/+1 |
| | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81290 91177308-0d34-0410-b5e6-96231b3b80d8 | ||||
* | change selectiondag to add the sign extended versions of immediate operands | Chris Lattner | 2009-09-08 | 1 | -3/+5 |
| | | | | | | | | | to instructions instead of zero extended ones. This makes the asmprinter print signed values more consistently. This apparently only really affects the X86 backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81265 91177308-0d34-0410-b5e6-96231b3b80d8 | ||||
* | Added optimization that narrow load / op / store and the 'op' is a bit ↵ | Evan Cheng | 2009-05-28 | 1 | -0/+23 |
twiddling instruction and its second operand is an immediate. If bits that are touched by 'op' can be done with a narrower instruction, reduce the width of the load and store as well. This happens a lot with bitfield manipulation code. e.g. orl $65536, 8(%rax) => orb $1, 10(%rax) Since narrowing is not always a win, e.g. i32 -> i16 is a loss on x86, dag combiner consults with the target before performing the optimization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72507 91177308-0d34-0410-b5e6-96231b3b80d8 |