| Commit message (Expand) | Author | Age | Files | Lines |
* | When the legalizer is splitting vector shifts, the result may not have the ri... | Benjamin Kramer | 2013-01-27 | 1 | -0/+11 |
* | X86: Do splat promotion later, so the optimizer can chew on it first. | Benjamin Kramer | 2013-01-26 | 2 | -17/+7 |
* | FileCheckize and merge some tests. | Benjamin Kramer | 2013-01-26 | 4 | -127/+227 |
* | In this patch, we teach X86_64TargetMachine that it has a ILP32 | Eli Bendersky | 2013-01-25 | 2 | -4/+43 |
* | Now that llvm-dwarfdump supports flags to specify which DWARF section to dump, | Eli Bendersky | 2013-01-25 | 1 | -1/+1 |
* | MIsched: Improve the interface to SchedDFS analysis (subtrees). | Andrew Trick | 2013-01-25 | 1 | -3/+0 |
* | MISched: Add SchedDFSResult to ScheduleDAGMI to formalize the | Andrew Trick | 2013-01-25 | 1 | -0/+3 |
* | Add the heuristic to differentiate SSPStrong from SSPRequired. | Bill Wendling | 2013-01-23 | 1 | -12/+2518 |
* | Add the IR attribute 'sspstrong'. | Bill Wendling | 2013-01-23 | 1 | -21/+628 |
* | Fix an issue of pseudo atomic instruction DAG schedule | Michael Liao | 2013-01-22 | 1 | -0/+110 |
* | llvm/test/CodeGen/X86/win_ftol2.ll: Add -cpu=generic to appease valgrind. | NAKAMURA Takumi | 2013-01-20 | 1 | -1/+1 |
* | Revert 172708. | Nadav Rotem | 2013-01-20 | 2 | -68/+0 |
* | On Sandybridge split unaligned 256bit stores into two xmm-sized stores. | Nadav Rotem | 2013-01-19 | 8 | -27/+38 |
* | On Sandybridge loading unaligned 256bits using two XMM loads (vmovups and vin... | Nadav Rotem | 2013-01-18 | 2 | -1/+22 |
* | llvm/test/CodeGen/X86/Atomics-64.ll: Tweak for 2nd RUN not to overwrite %t. I... | NAKAMURA Takumi | 2013-01-18 | 1 | -2/+2 |
* | Optimization for the following SIGN_EXTEND pairs: | Elena Demikhovsky | 2013-01-17 | 2 | -0/+80 |
* | X86: Add patterns for X86ISD::VSEXT in registers. | Benjamin Kramer | 2013-01-13 | 1 | -0/+176 |
* | Update patch for the pad short functions pass for Intel Atom (only). | Preston Gurd | 2013-01-11 | 1 | -0/+25 |
* | Simplify writing floating types to assembly. | Tim Northover | 2013-01-11 | 1 | -0/+40 |
* | llvm/test/CodeGen/X86/ms-inline-asm.ll: Fixup; Globals doesn't have leading u... | NAKAMURA Takumi | 2013-01-10 | 1 | -2/+2 |
* | PR14896: Handle memcpy from constant string where the memcpy size is larger t... | Evan Cheng | 2013-01-10 | 1 | -0/+13 |
* | [ms-inline asm] Add support for calling functions from inline assembly. | Chad Rosier | 2013-01-10 | 1 | -0/+18 |
* | Fix a DAG combine bug visitBRCOND() is transforming br(xor(x, y)) to br(x != y). | Evan Cheng | 2013-01-09 | 1 | -0/+41 |
* | add -march to the test | Nadav Rotem | 2013-01-09 | 1 | -1/+1 |
* | Efficient lowering of vector sdiv when the divisor is a splatted power of two... | Nadav Rotem | 2013-01-09 | 1 | -0/+72 |
* | Pad Short Functions for Intel Atom | Preston Gurd | 2013-01-08 | 4 | -5/+83 |
* | Fix suffix handling for parsing and printing of cvtsi2ss, cvtsi2sd, cvtss2si,... | Craig Topper | 2013-01-06 | 3 | -5/+5 |
* | Fix for PR14739. It's not safe to fold a load into a call across a store. Tha... | Evan Cheng | 2013-01-06 | 1 | -4/+21 |
* | Recommit r171461 which was incorrectly reverted. Mark DIV/IDIV instructions h... | Craig Topper | 2013-01-05 | 1 | -0/+31 |
* | Revert revision 171524. Original message: | Nadav Rotem | 2013-01-05 | 4 | -76/+5 |
* | The current Intel Atom microarchitecture has a feature whereby when a function | Preston Gurd | 2013-01-04 | 4 | -5/+76 |
* | Revert revision: 171467. This transformation is incorrect and makes some test... | Nadav Rotem | 2013-01-04 | 1 | -15/+0 |
* | Simplified TRUNCATE operation that comes after SETCC. It is possible since SE... | Elena Demikhovsky | 2013-01-03 | 1 | -0/+15 |
* | Revert "Mark DIV/IDIV instructions hasSideEffects=1 because they can trap whe... | Michael Gottesman | 2013-01-03 | 1 | -32/+0 |
* | Mark DIV/IDIV instructions hasSideEffects=1 because they can trap when dividi... | Craig Topper | 2013-01-03 | 1 | -0/+32 |
* | Fix PR14732 by handling all kinds of IMPLICIT_DEF live ranges. | Jakob Stoklund Olesen | 2013-01-03 | 1 | -0/+130 |
* | DAGCombiner: Avoid generating illegal vector INT_TO_FP nodes | Tom Stellard | 2013-01-02 | 1 | -0/+4 |
* | AVX: Fix a bug in WidenMaskArithmetic. | Nadav Rotem | 2013-01-02 | 2 | -8/+32 |
* | Tests: rewrite 'opt ... %s' to 'opt ... < %s' so that opt does not emit a Mod... | Dmitri Gribenko | 2012-12-30 | 2 | -2/+2 |
* | AVX: Move the ZEXT/ANYEXT DAGCo optimizations to the lowering of these optimi... | Nadav Rotem | 2012-12-28 | 1 | -2/+1 |
* | On AVX/AVX2 the type v8i1 is legalized to v8i16, which is an XMM sized | Nadav Rotem | 2012-12-27 | 1 | -0/+38 |
* | llvm/test/CodeGen/X86: FileCheck-ize two tests in r171083. | NAKAMURA Takumi | 2012-12-26 | 2 | -2/+17 |
* | llvm/test/CodeGen/X86: Disable avx in two tests corresponding to r171082. | NAKAMURA Takumi | 2012-12-26 | 2 | -2/+2 |
* | Harden test so it's not affected by changes to compare lowering. | Benjamin Kramer | 2012-12-25 | 1 | -1/+1 |
* | X86: Shave off one shuffle from the pcmpeqq sequence for SSE2 by making use o... | Benjamin Kramer | 2012-12-25 | 1 | -4/+2 |
* | X86: Custom lower <2 x i64> eq and ne when SSE41 is not available. | Benjamin Kramer | 2012-12-25 | 1 | -0/+26 |
* | llvm/test/CodeGen/X86/fold-vex.ll: Add explicit triple. | NAKAMURA Takumi | 2012-12-24 | 1 | -1/+1 |
* | Some x86 instructions can load/store one of the operands to memory. On SSE, t... | Nadav Rotem | 2012-12-24 | 1 | -0/+16 |
* | X86: Turn mul of <4 x i32> into pmuludq when no SSE4.1 is available. | Benjamin Kramer | 2012-12-22 | 1 | -0/+14 |
* | X86: Emit vector sext as shuffle + sra if vpmovsx is not available. | Benjamin Kramer | 2012-12-22 | 1 | -23/+96 |