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* this test requires SSE, thanks to jyasskin for pointing this out.Chris Lattner2010-01-131-1/+1
* Commit some changes I had managed to lose last night while refactoring the co...Evan Cheng2010-01-132-1/+47
* Re-enable extension optimization pass.Evan Cheng2010-01-132-2/+1
* Disable opt-ext pass to unbreak the build for now.Evan Cheng2010-01-133-2/+3
* Try to fix the ARM and PPC buildbots. The -mattr=vector-unaligned-memJeffrey Yasskin2010-01-131-1/+1
* Add a quick pass to optimize sign / zero extension instructions. For targets ...Evan Cheng2010-01-133-2/+19
* Add nounwind.Evan Cheng2010-01-121-2/+2
* Revert commit 93204, since it causes the assembler to barfDuncan Sands2010-01-121-1/+1
* Make several tests less fragile.Dan Gohman2010-01-123-10/+12
* Reapply the MOV64r0 patch, with a fix: MOV64r0 clobbers EFLAGS.Dan Gohman2010-01-121-1/+0
* Add manual ISD::OR fastisel selection routines. TableGen is no longer autogen...Evan Cheng2010-01-111-1/+1
* Extend r93152 to work on OR r, r. If the source set bits are known not to ove...Evan Cheng2010-01-112-1/+17
* reduce this to a sensible testcase.Chris Lattner2010-01-111-18/+5
* Shorten up this testcase.David Greene2010-01-111-378/+0
* Revert 93158. It's breaking quite a few x86_64 tests.Evan Cheng2010-01-111-0/+1
* Avoid adding PHI arguments for a predecessor that has gone away when a BRCOND...Jakob Stoklund Olesen2010-01-111-0/+97
* Use a 32-bit and with implicit zero-extension instead of a 64-bit and if itDan Gohman2010-01-111-3/+40
* Re-instate MOV64r0 and MOV16r0, with adjustments to work with theDan Gohman2010-01-111-0/+13
* Generalize this check to avoid depending on a specific register assignment.Dan Gohman2010-01-111-1/+1
* Make this test less trivial, to avoid spurious failures.Dan Gohman2010-01-111-2/+2
* Select an OR with immediate as an ADD if the input bits are known zero. This ...Evan Cheng2010-01-112-1/+18
* Implement a feature (-vector-unaligned-mem) to allow targets toDavid Greene2010-01-111-0/+402
* Fix http://llvm.org/PR5729: x86-64 tail calls were putting their targets intoJeffrey Yasskin2010-01-091-0/+71
* Revert an earlier change to SIGN_EXTEND_INREG for vectors. The VTSDNodeDan Gohman2010-01-092-0/+49
* Fix a critical bug in 64-bit atomic operation lowering for 32-bit. The result...Evan Cheng2010-01-081-0/+29
* ReplaceAllUsesOfValueWith may delete other nodes that the one being replaced....Evan Cheng2010-01-081-0/+27
* Fix rdar://7517201, a regression introduced by r92849.Chris Lattner2010-01-072-50/+23
* Fix a minor regression from my dag combiner changes. One more place which nee...Evan Cheng2010-01-071-3/+40
* Teach dag combine to fold the following transformation more aggressively:Evan Cheng2010-01-061-0/+36
* Move this test from test/Transforms/IndVarSimplify toDan Gohman2010-01-051-0/+19
* Don't assign the shift the same type as the variable being shifted. This couldBill Wendling2010-01-051-0/+15
* Delete useless trailing semicolons.Dan Gohman2010-01-0511-25/+25
* Make this test more portable.Dan Gohman2010-01-041-1/+1
* Add some tests and update an existing test to reflect recentDan Gohman2010-01-043-11/+104
* fix PR5930, allowing the asmprinter to emit difference betweenChris Lattner2010-01-031-0/+29
* add PR#Chris Lattner2010-01-031-0/+1
* differences between two blockaddress's don't cause a Chris Lattner2010-01-031-0/+21
* allow this to work on linux hosts.Chris Lattner2010-01-021-1/+1
* Teach codegen to handle:Chris Lattner2010-01-021-2/+42
* rename file.Chris Lattner2010-01-011-0/+0
* Teach codegen to lower llvm.powi to an efficient (but not optimal) Chris Lattner2010-01-012-35/+29
* handle equality memcmp of 8 bytes on x86-64 with two unaligned loads and a Chris Lattner2009-12-241-4/+38
* move an optimization for memcmp out of simplifylibcalls and into Chris Lattner2009-12-241-0/+76
* Update objectsize intrinsic and associated dependencies. FixEric Christopher2009-12-231-4/+4
* Remove target attribute break-sse-dep. Instead, do not fold load into sse par...Evan Cheng2009-12-221-14/+7
* Increase opportunities to optimize (brcond (srl (and c1), c2)).Evan Cheng2009-12-181-0/+29
* On recent Intel u-arch's, folding loads into some unary SSE instructions canEvan Cheng2009-12-181-0/+28
* Tidy up this testcase and add test for tailcall optimizationDan Gohman2009-12-181-7/+12
* Remove "tail" keywords. These calls are not intended to be tail calls.Dan Gohman2009-12-181-33/+33
* Instruction fixes, added instructions, and AsmString changes in theSean Callanan2009-12-1815-197/+197