| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Emit direction operand in binary insns that stores in memory. | Sanjiv Gupta | 2009-12-19 | 1 | -0/+13 |
| * | Test cases for changes done in 91768. | Sanjiv Gupta | 2009-12-19 | 2 | -0/+21 |
| * | Increase opportunities to optimize (brcond (srl (and c1), c2)). | Evan Cheng | 2009-12-18 | 1 | -0/+29 |
| * | On recent Intel u-arch's, folding loads into some unary SSE instructions can | Evan Cheng | 2009-12-18 | 1 | -0/+28 |
| * | Tidy up this testcase and add test for tailcall optimization | Dan Gohman | 2009-12-18 | 1 | -7/+12 |
| * | Handle ARM inline asm "w" constraints with 64-bit ("d") registers. | Bob Wilson | 2009-12-18 | 1 | -0/+12 |
| * | Remove "tail" keywords. These calls are not intended to be tail calls. | Dan Gohman | 2009-12-18 | 1 | -33/+33 |
| * | Add test case for the phi reuse patch. | Jakob Stoklund Olesen | 2009-12-18 | 1 | -0/+66 |
| * | Instruction fixes, added instructions, and AsmString changes in the | Sean Callanan | 2009-12-18 | 15 | -197/+197 |
| * | Revert this dag combine change: | Evan Cheng | 2009-12-17 | 1 | -4/+4 |
| * | Make this test pass on Linux. | Nick Lewycky | 2009-12-16 | 1 | -9/+20 |
| * | Re-enable 91381 with fixes. | Evan Cheng | 2009-12-16 | 1 | -1/+0 |
| * | Do better with physical reg operands (typically, from inline asm) | Dale Johannesen | 2009-12-16 | 2 | -2/+51 |
| * | For fastcc on x86, let ECX be used as a return register after EAX and EDX | Kenneth Uildriks | 2009-12-15 | 1 | -0/+15 |
| * | Disable 91381 for now. It's miscompiling ARMISelDAG2DAG.cpp. | Evan Cheng | 2009-12-15 | 1 | -0/+1 |
| * | Make 91378 more conservative. | Evan Cheng | 2009-12-15 | 1 | -13/+0 |
| * | Use sbb x, x to materialize carry bit in a GPR. The result is all one's or al... | Evan Cheng | 2009-12-15 | 1 | -0/+23 |
| * | Fold (zext (and x, cst)) -> (and (zext x), cst). | Evan Cheng | 2009-12-15 | 1 | -4/+4 |
| * | Propagate zest through logical shift. | Evan Cheng | 2009-12-15 | 2 | -0/+51 |
| * | Fix integer cast code to handle vector types. | Dan Gohman | 2009-12-14 | 1 | -0/+13 |
| * | Disable r91104 for x86. It causes partial register stall which pessimize code... | Evan Cheng | 2009-12-12 | 1 | -1/+3 |
| * | Lower setcc branchless, if this is profitable. | Anton Korobeynikov | 2009-12-11 | 1 | -0/+116 |
| * | Implement vector widening, splitting, and scalarizing for SIGN_EXTEND_INREG. | Dan Gohman | 2009-12-11 | 1 | -0/+37 |
| * | Change this to the correct PR number. | Dan Gohman | 2009-12-11 | 1 | -1/+1 |
| * | Fix the result type of SELECT nodes lowered from Select instructions with | Dan Gohman | 2009-12-11 | 1 | -0/+15 |
| * | Honour setHasCalls() set from isel. | Anton Korobeynikov | 2009-12-11 | 1 | -0/+63 |
| * | Tests for 91103 and 91104. | Evan Cheng | 2009-12-11 | 1 | -0/+93 |
| * | It's not safe to coalesce a move where src and dst registers have different s... | Evan Cheng | 2009-12-10 | 1 | -0/+40 |
| * | Fix test. | Evan Cheng | 2009-12-09 | 1 | -1/+1 |
| * | Optimize splat of a scalar load into a shuffle of a vector load when it's leg... | Evan Cheng | 2009-12-09 | 1 | -0/+43 |
| * | Teach InferPtrAlignment to infer GV+cst alignment and use it to simplify x86 ... | Evan Cheng | 2009-12-09 | 1 | -3/+3 |
| * | - Support inline asm 'w' constraint for 128-bit vector types. | Evan Cheng | 2009-12-08 | 1 | -0/+13 |
| * | Reduce (cmp 0, and_su (foo, bar)) into (bit foo, bar). This saves extra instr... | Anton Korobeynikov | 2009-12-08 | 1 | -0/+166 |
| * | Use FileCheck and set nounwind on calls. | David Greene | 2009-12-07 | 1 | -6/+7 |
| * | Don't enable the post-RA scheduler on x86 except at -O3. In its | Dan Gohman | 2009-12-07 | 8 | -8/+8 |
| * | Dynamic stack realignment use of sp register as source/dest register | Anton Korobeynikov | 2009-12-06 | 2 | -2/+2 |
| * | Temporarily revert r90502. It was causing the llvm-gcc bootstrap on PPC to fail. | Bill Wendling | 2009-12-05 | 2 | -2/+2 |
| * | Also attempt trivial coalescing for live intervals that end in a copy. | Jakob Stoklund Olesen | 2009-12-04 | 2 | -2/+2 |
| * | Don't pull vector sext through both hands of a logical operation, since doing... | Nate Begeman | 2009-12-03 | 1 | -0/+29 |
| * | Recognize canonical forms of vector shuffles where the same vector is used for | Bob Wilson | 2009-12-03 | 1 | -0/+19 |
| * | Remove unnecessary check. | Bill Wendling | 2009-12-02 | 1 | -1/+0 |
| * | Fix PR5391: support early clobber physical register def tied with a use (ewwww) | Evan Cheng | 2009-12-01 | 1 | -0/+38 |
| * | test case for IV-Users simplification loop improvement | Jim Grosbach | 2009-12-01 | 1 | -0/+128 |
| * | Use CFG connectedness as a secondary sort key when deciding the order of copy... | Jakob Stoklund Olesen | 2009-12-01 | 1 | -0/+1 |
| * | Fix PR5614: parts of a physical register def may be killed the rest. | Evan Cheng | 2009-12-01 | 1 | -0/+41 |
| * | New virtual registers created for spill intervals should inherit allocation h... | Jakob Stoklund Olesen | 2009-11-30 | 1 | -1/+1 |
| * | Add test case for r90108 | Mon P Wang | 2009-11-30 | 1 | -0/+154 |
| * | While this test is testing a problem in the generic part of codegen, | Duncan Sands | 2009-11-27 | 2 | -1/+36 |
| * | Test for 89905. | Evan Cheng | 2009-11-26 | 1 | -0/+116 |
| * | ProcessImplicitDefs should watch out for invalidated iterator and extra impli... | Evan Cheng | 2009-11-25 | 1 | -0/+56 |
