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* Fix @llvm.prefetch isel. Selecting between pld / pldw using the first immedia...Evan Cheng2010-11-041-16/+13
* Covert VORRIMM to be produced via early target-specific DAG combining, rather...Owen Anderson2010-11-031-1/+1
* Add support for code generation of the one register with immediate form of vorr.Owen Anderson2010-11-031-0/+20
* Fix test.Evan Cheng2010-11-031-1/+1
* This test assumes SSE is present; that is not the defaultDale Johannesen2010-11-031-1/+1
* Add codegen patterns for VST1-lane instructions. Radar 8599955.Bob Wilson2010-11-033-5/+66
* Check for extractelement with a variable operand for the element number.Bob Wilson2010-11-031-0/+17
* Fix preload instruction isel. Only v7 supports pli, and only v7 with mp exten...Evan Cheng2010-11-031-2/+2
* Add support to match @llvm.prefetch to pld / pldw / pli. rdar://8601536.Evan Cheng2010-11-031-0/+64
* Fix DAGCombiner to avoid going into an infinite loop when itDan Gohman2010-11-031-0/+32
* Two sets of changes. Sorry they are intermingled.Evan Cheng2010-11-036-31/+101
* Inline asm mult-alt constraint tests.John Thompson2010-11-028-0/+2611
* Revert r114340 (improvements in Darwin function prologue/epilogue), as it brokeJim Grosbach2010-11-022-7/+8
* Use frameindex, if available, as a last resort to emit debug info for a param...Devang Patel2010-11-021-0/+35
* Add support for alignment operands on VLD1-lane instructions.Bob Wilson2010-11-011-10/+13
* Add VLD1-lane testcases for quad-register types.Bob Wilson2010-11-011-0/+27
* Add NEON VLD1-lane instructions. Partial fix for Radar 8599955.Bob Wilson2010-11-011-0/+27
* When we look at instructions to convert to setting the 's' flag, we need to lookBill Wendling2010-11-012-11/+14
* NEON does not support truncating vector stores. Radar 8598391.Bob Wilson2010-11-011-0/+10
* More tests to XFAIL. The arm-and-txt-peephole.ll test passes even when theBill Wendling2010-11-012-4/+5
* Disable because peephole is disabled.Bill Wendling2010-11-011-0/+1
* Overhaul memory barriers in the ARM backend. Radar 8601999.Bob Wilson2010-10-302-14/+28
* Teach machine cse to eliminate instructions with multiple physreg uses and de...Evan Cheng2010-10-291-1/+7
* Remove DAG combiner patch to fold vector splats. Instcombiner does it now.Bob Wilson2010-10-291-16/+0
* Avoiding overly aggressive latency scheduling. If the two nodes share anEvan Cheng2010-10-292-1/+4
* Teach the DAG combiner to fold a splat of a splat. Radar 8597790.Bob Wilson2010-10-281-0/+16
* Re-commit 117518 and 117519 now that ARM MC test failures are out of the way.Evan Cheng2010-10-287-8/+8
* Revert 117518 and 117519 for now. They changed scheduling and cause MC tests ...Evan Cheng2010-10-287-8/+8
* - Assign load / store with shifter op address modes the right itinerary classes.Evan Cheng2010-10-287-8/+8
* Fix pastos in handling of AVX cvttsd2si, PR8491.Dale Johannesen2010-10-282-2/+2
* Shifter ops are not always free. Do not fold them (especially to formEvan Cheng2010-10-271-9/+63
* SelectionDAG shuffle nodes do not allow operands with different numbers ofBob Wilson2010-10-271-0/+18
* FileCheck'izeJim Grosbach2010-10-261-2/+3
* Change v64 datalayout in SPU.Kalle Raiskila2010-10-262-2/+15
* When the "true" and "false" blocks of a diamond if-conversion are the same,Bob Wilson2010-10-261-0/+31
* An stdcall function calling a non-stdcall functionDale Johannesen2010-10-251-0/+13
* Add support for emitting ARM file attributes.Rafael Espindola2010-10-251-0/+19
* X86: Emit _fltused instead of __fltused on Windows x64.Michael J. Spencer2010-10-231-2/+4
* tidy upJim Grosbach2010-10-221-3/+2
* Remove duplicate test.Jim Grosbach2010-10-221-9/+0
* tidy up.Jim Grosbach2010-10-221-33/+33
* FileCheck-ize a few tests.Jim Grosbach2010-10-222-21/+26
* Recommit 116986 with capitalization typo fixed.Wesley Peck2010-10-217-110/+60
* putback r116983 and fix simple-fp-encoding.ll testsAndrew Trick2010-10-212-2/+3
* Reverting the commit 116986. It was breaking the build on llvm-x86_64-linux t...Wesley Peck2010-10-217-60/+110
* Revert r116983, which is breaking all the buildbots.Owen Anderson2010-10-212-3/+2
* Major update of the MicroBlaze backend. The new features are:Wesley Peck2010-10-217-110/+60
* Add missing scheduling itineraries for transfers between core registers and V...Evan Cheng2010-10-212-2/+3
* More accurate estimate / tracking of register pressure.Evan Cheng2010-10-202-2/+15
* Fix crash introduced in 116852. 8573915.Dale Johannesen2010-10-201-0/+17
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