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* Teach DAG combine to handle vector add/sub with vectors of all 0s.Craig Topper2012-12-102-5/+5
* Teach DAG combine to handle vector logical operations with vectors of all 1s ...Craig Topper2012-12-083-23/+21
* When we use the BLEND instruction that uses the MSB as a mask, we can removeNadav Rotem2012-12-072-2/+2
* In hexagon convertToHardwareLoop, don't deref end() iteratorMatthew Curtis2012-12-071-1/+1
* X86: Prefer using VPSHUFD over VPERMIL because it has better throughput.Nadav Rotem2012-12-073-5/+5
* Added Mapping Symbols for ARM ELFTim Northover2012-12-071-2/+2
* Fix typos in CHECK lines.Dmitri Gribenko2012-12-062-2/+2
* Fix a bug in the code that merges consecutive stores. Previously we did notNadav Rotem2012-12-061-0/+23
* Remove intrinsic specific instructions for (V)MOVQUmr with patterns pointing ...Craig Topper2012-12-061-1/+4
* Properly fix the tes.Evan Cheng2012-12-061-2/+1
* llvm/test/CodeGen/ARM/extload-knownzero.ll: Try to unbreak, to add -O0. I gue...NAKAMURA Takumi2012-12-061-1/+1
* [arm fast-isel] Make the fast-isel implementation of memcpy respect alignment.Chad Rosier2012-12-061-3/+94
* Let targets provide hooks that compute known zero and ones for any_extendEvan Cheng2012-12-061-0/+27
* RegisterPressureTracker: fix findUseBetween to handle DebugValueAndrew Trick2012-12-051-0/+49
* RegisterPresssureTracker: Track live physical register by unit.Andrew Trick2012-12-051-0/+30
* [NVPTX] Fix crash with unnamed struct argumentsJustin Holewinski2012-12-051-0/+5
* Use multiclass to define store instructions with base+immediate offsetJyotsna Verma2012-12-052-4/+3
* Simplified BLEND pattern matching for shuffles.Elena Demikhovsky2012-12-052-6/+53
* Add x86 isel lowering logic to form bit test with inverted condition. e.g.Evan Cheng2012-12-051-3/+97
* ARM custom lower ctpop for vector types. Patch by Pete Couperus.Evan Cheng2012-12-041-0/+191
* Use the 'count' attribute to calculate the upper bound of an array.Bill Wendling2012-12-049-9/+9
* This patch introduces initial-exec model support for thread-local storageBill Schmidt2012-12-042-0/+53
* Add a 'count' field to the DWARF subrange.Bill Wendling2012-12-048-8/+8
* Stack Alignment: when creating stack objects in MachineFrameInfo, make sureManman Ren2012-12-041-0/+48
* Allow merging multiple store sequences on the same chain.Nadav Rotem2012-12-021-0/+31
* Fix an invalid regex in the testEli Bendersky2012-12-021-1/+1
* misched: Fix RegisterPressureTracker handling of DebugVals.Andrew Trick2012-12-011-0/+43
* misched: Fix the DAG builder to handle an undef operand at ExitSU.Andrew Trick2012-12-011-0/+26
* misched: Fix LiveInterval update to better handle DebugVal.Andrew Trick2012-12-011-0/+50
* misched: fix RegionBegin when DebugValues get shuffled to the top.Andrew Trick2012-12-011-0/+85
* Simplify REG_SEQUENCE lowering.Jakob Stoklund Olesen2012-12-011-3/+3
* test/CodeGen/PowerPC/vec_mul.ll: Add a triple. Thanks, Hal.Chad Rosier2012-11-301-3/+3
* Codegen failure for vmull with small vectorsSebastian Pop2012-11-301-0/+150
* test/CodeGen/PowerPC/vec_mul.ll: Fix register operands.Chad Rosier2012-11-301-2/+2
* test/CodeGen/PowerPC: Add explicit -march=ppc32.NAKAMURA Takumi2012-11-302-2/+2
* This patch fixes the Altivec addend construction for the fused multiply-addAdhemerval Zanella2012-11-302-10/+33
* Handle the situation where CodeGenPrepare removes a reference to a BB that hasBill Wendling2012-11-291-0/+23
* Added atomic 64 min/max/umin/umax instrinsics support in the ARM backend.Silviu Baranga2012-11-291-0/+61
* Teach the legalizer how to handle operands for VSELECT nodesJustin Holewinski2012-11-291-0/+16
* Allow targets to prefer TypeSplitVector over TypePromoteInteger when computin...Justin Holewinski2012-11-291-0/+19
* Avoid rewriting instructions twice.Jakob Stoklund Olesen2012-11-291-0/+41
* When combining consecutive stores allow loads in between the stores, if the l...Nadav Rotem2012-11-291-0/+52
* ARM: Implement CanLowerReturn so large vectors get expanded into sret.Benjamin Kramer2012-11-281-0/+12
* misched: Analysis that partitions the DAG into subtrees.Andrew Trick2012-11-281-0/+68
* misched: better alias analysis.Andrew Trick2012-11-281-0/+127
* This patch makes medium code model the default for 64-bit PowerPC ELF.Bill Schmidt2012-11-271-0/+26
* Add -verify-machineinstrs to these fast-isel test cases.Chad Rosier2012-11-274-6/+6
* CSE: allow PerformTrivialCoalescing to check copies across basic blockManman Ren2012-11-271-0/+32
* X86: do not fold load instructions such as [V]MOVS[S|D] to other instructionsManman Ren2012-11-271-0/+39
* This patch implements medium code model support for 64-bit PowerPC.Bill Schmidt2012-11-278-0/+403