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* Fix a silly use-after-free issue. A much earlier version of this codeChandler Carruth2011-11-241-0/+211
* When adding blocks to the list of those which no longer have any CFGChandler Carruth2011-11-241-0/+56
* X86: Use btq for bit tests if the immediate can't be encoded in 32 bits.Benjamin Kramer2011-11-231-0/+35
* test/CodeGen/X86/block-placement.ll: Add explicit -mtriple=i686-linux. X86 Wi...NAKAMURA Takumi2011-11-231-1/+1
* Relax an invariant that block placement was trying to assert a bitChandler Carruth2011-11-231-0/+25
* I added several lines in X86 code generator that allow to choose Elena Demikhovsky2011-11-231-0/+14
* Handle the case of a no-return invoke correctly. It actually still hasChandler Carruth2011-11-231-0/+24
* Enable stack protectors for all arrays, not just char arrays. rdar://5875909Bob Wilson2011-11-231-1/+1
* Fix PR11422.Jakob Stoklund Olesen2011-11-231-0/+99
* Fix a crash in block placement due to an inner loop that happened to beChandler Carruth2011-11-231-0/+41
* add basic PPC register-pressure feedback; adjust the vaarg test to match the ...Hal Finkel2011-11-221-92/+90
* Fix a devilish miscompile exposed by block placement. TheChandler Carruth2011-11-221-0/+28
* Add triple to the test.Rafael Espindola2011-11-221-1/+1
* If a register is both an early clobber and part of a tied use, handle the useRafael Espindola2011-11-221-0/+23
* Lowering for v32i8 to VPUNPCKLBW/VPUNPCKHBW when AVX2 is enabled.Craig Topper2011-11-211-0/+14
* Test case for r145026Craig Topper2011-11-211-0/+43
* Make LowerSIGN_EXTEND_INREG split 256-bit vectors when AVX1 is enabled and us...Craig Topper2011-11-212-0/+44
* test/CodeGen/X86/block-placement.ll: Relax expressions for Win32.NAKAMURA Takumi2011-11-201-3/+3
* The logic for breaking the CFG in the presence of hot successors didn'tChandler Carruth2011-11-201-0/+36
* Add some comments to the latest test case I added here to document whatChandler Carruth2011-11-201-1/+22
* Add code for lowering v32i8 shifts by a splat to AVX2 immediate shift instruc...Craig Topper2011-11-201-12/+50
* Use 256-bit vcmpeqd for creating an all ones vector when AVX2 is enabled.Craig Topper2011-11-191-0/+12
* Move the handling of unanalyzable branches out of the loop-driven chainChandler Carruth2011-11-191-0/+25
* Test cases for SSSE3/AVX integer horizontal add/sub.Craig Topper2011-11-191-0/+170
* Extend VPBLENDVB and VPSIGN lowering to work for AVX2.Craig Topper2011-11-191-0/+29
* Add AVX2 vpbroadcast supportNadav Rotem2011-11-181-0/+142
* DISubrange supports unsigned lower/upper array bounds, so let's not fake it i...Devang Patel2011-11-171-0/+37
* When fast iseling a GEP, accumulate the offset rather than emitting a series ofChad Rosier2011-11-171-0/+65
* Make sure to replace the chain properly when DAGCombining a LOAD+EXTRACT_VECT...Eli Friedman2011-11-161-1/+1
* Another missing X86ISD::MOVLPD pattern. rdar://10450317Evan Cheng2011-11-161-0/+17
* Disable expensive two-address optimizations at -O0. rdar://10453055Evan Cheng2011-11-162-5/+4
* Fix testcase.Eli Friedman2011-11-161-1/+0
* CONCAT_VECTORS can have more than two operands. PR11389.Eli Friedman2011-11-161-0/+9
* AVX: Add support for vbroadcast from BUILD_VECTOR and refactor some of the vb...Nadav Rotem2011-11-151-3/+0
* test/CodeGen/X86/dec-eflags-lower.ll: Relax expression for win32 x64.NAKAMURA Takumi2011-11-151-1/+1
* Added custom lowering for load->dec->store sequence in x86 when the EFLAGS re...Pete Cooper2011-11-151-0/+29
* We currently use a callback to handle an IL pass deleting a BB that stillRafael Espindola2011-11-151-0/+19
* Revert r144611 and r144613.Jakob Stoklund Olesen2011-11-152-3/+3
* Rather than trying to use the loop block sequence *or* the functionChandler Carruth2011-11-151-1/+72
* Properly qualify AVX2 specific parts of execution dependency table. Also enab...Craig Topper2011-11-152-14/+41
* Really fix test.Jakob Stoklund Olesen2011-11-151-1/+1
* Allow for depencendy-breaking instructions before cvt*.Jakob Stoklund Olesen2011-11-152-2/+2
* Add vmov.f32 to materialize f32 immediate splats which cannot be handled byEvan Cheng2011-11-152-3/+20
* Break false dependencies before partial register updates.Jakob Stoklund Olesen2011-11-151-0/+41
* ARM VLDR/VSTR instructions don't need a size suffix.Jim Grosbach2011-11-1419-50/+50
* Add newline to end of file. Thanks, Eli.Chad Rosier2011-11-141-1/+1
* Add support for inlining small memcpys.Chad Rosier2011-11-141-3/+31
* Fix a performance regression from r144565. Positive offsets were being loweredChad Rosier2011-11-141-0/+55
* Add a missing pattern for X86ISD::MOVLPD. rdar://10436044Evan Cheng2011-11-141-0/+18
* Add support for Thumb load/stores with negative offsets.Chad Rosier2011-11-141-0/+168
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