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* Add file missing from r195474.Richard Sandiford2013-11-221-0/+49
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195475 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195473:Richard Sandiford2013-11-221-0/+1
| | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r195473 | rsandifo | 2013-11-22 17:28:28 +0000 (Fri, 22 Nov 2013) | 10 lines [SystemZ] Fix TMHH and TMHL usage for z10 with -O0 I've no idea why I decided to handle TMxx differently from all the other high/low logic operations, but it was a stupid thing to do. The high registers aren't available as separate 32-bit registers on z10, so subreg_h32 can't be used on a GR64 there. I've normally been testing with z196 and with -O3 and so hadn't noticed this until now. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195474 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195398:Bill Wendling2013-11-221-0/+15
| | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r195398 | tstellar | 2013-11-21 16:41:05 -0800 (Thu, 21 Nov 2013) | 7 lines SelectionDAG: Optimize expansion of vec_type = BITCAST scalar_type The legalizer can now do this type of expansion for more type combinations without loading and storing to and from the stack. NOTE: This is a candidate for the 3.4 branch. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195414 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195339:Bill Wendling2013-11-211-32/+0
| | | | | | | | | | | | | | | ------------------------------------------------------------------------ r195339 | chapuni | 2013-11-21 02:55:15 -0800 (Thu, 21 Nov 2013) | 5 lines Revert r195317 (and r195333), "Teach ISel not to optimize 'optnone' functions." It broke, at least, i686 target. It is reproducible with "llc -mtriple=i686-unknown". FYI, it didn't appear to add either "-O0" or "-fast-isel". ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195375 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195333:Bill Wendling2013-11-211-0/+1
| | | | | | | | | | | ------------------------------------------------------------------------ r195333 | kcc | 2013-11-21 01:28:16 -0800 (Thu, 21 Nov 2013) | 1 line add 'REQUIRES: asserts' to a test that uses 'llc -debug'; this fixes the no-asserts build ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195374 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195355:Daniel Sanders2013-11-212-0/+234
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r195355 | dsanders | 2013-11-21 13:24:49 +0000 (Thu, 21 Nov 2013) | 20 lines Add support for legalizing SETNE/SETEQ by inverting the condition code and the result of the comparison. Summary: LegalizeSetCCCondCode can now legalize SETEQ and SETNE by returning the inverse condition and requesting that the caller invert the result of the condition. The caller of LegalizeSetCCCondCode must handle the inverted CC, and they do so as follows: SETCC, BR_CC: Invert the result of the SETCC with SelectionDAG::getNOT() SELECT_CC: Swap the true/false operands. This is necessary for MSA which lacks an integer SETNE instruction. Reviewers: resistor CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D2229 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195363 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195317:Bill Wendling2013-11-211-0/+31
| | | | | | | | | | | | | | ------------------------------------------------------------------------ r195317 | probinson | 2013-11-20 22:33:32 -0800 (Wed, 20 Nov 2013) | 4 lines Teach ISel not to optimize 'optnone' functions. Based on work by Andrea Di Biagio. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195321 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195272:Bill Wendling2013-11-211-0/+16
| | | | | | | | | | | | | | ------------------------------------------------------------------------ r195272 | hfinkel | 2013-11-20 12:54:55 -0800 (Wed, 20 Nov 2013) | 4 lines PPC popcnt[dw] do not have record forms The instruction definitions incorrectly specified that popcntd and popcntw have record forms; they do not. This mistake was causing invalid code generation. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195320 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195318:Bill Wendling2013-11-212-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r195318 | void | 2013-11-20 23:04:30 -0800 (Wed, 20 Nov 2013) | 29 lines The basic problem is that some mainstream programs cannot deal with the way clang optimizes tail calls, as in this example: int foo(void); int bar(void) { return foo(); } where the call is transformed to: calll .L0$pb .L0$pb: popl %eax .Ltmp0: addl $_GLOBAL_OFFSET_TABLE_+(.Ltmp0-.L0$pb), %eax movl foo@GOT(%eax), %eax popl %ebp jmpl *%eax # TAILCALL However, the GOT references must all be resolved at dlopen() time, and so this approach cannot be used with lazy dynamic linking (e.g. using RTLD_LAZY), which usually populates the PLT with stubs that perform the actual resolving. This patch changes X86TargetLowering::LowerCall() to skip tail call optimization, if the called function is a global or external symbol. Patch by Dimitry Andric! PR15086 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195319 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195129:Bill Wendling2013-11-201-0/+1
| | | | | | | | | | | | ------------------------------------------------------------------------ r195129 | mcinally | 2013-11-19 06:36:00 -0800 (Tue, 19 Nov 2013) | 2 lines Fix assembly operands for the SSE2 cvtsd2ss instruction. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195218 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195094:Bill Wendling2013-11-191-1/+41
| | | | | | | | | | | | | ------------------------------------------------------------------------ r195094 | atrick | 2013-11-18 19:29:59 -0800 (Mon, 18 Nov 2013) | 3 lines Use symbolic operands in the patchpoint folding routine and fix a spilling bug. Fixes <rdar://15487687> [JS] AnyRegCC argument ends up being spilled ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195113 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post.Hao Liu2013-11-192-0/+2432
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195078 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AArch64 SISD intrinsics for vget_high and vget_low.Jiangning Liu2013-11-191-0/+225
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195074 91177308-0d34-0410-b5e6-96231b3b80d8
* Add predicate for AArch64 crypto instructions.Jiangning Liu2013-11-191-1/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195071 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Fix moveToVALU when the first operand is VSrc.Matt Arsenault2013-11-181-11/+10
| | | | | | | Moving into a VSrc doesn't always work, since it could be replaced with an SGPR later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195042 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Fix multiple SGPR reads when using VCC.Matt Arsenault2013-11-181-3/+18
| | | | | | | No other SGPR operands are allowed, so if VCC is used, move the other to a VGPR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195041 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Implement add i64, but do not yet enable.Matt Arsenault2013-11-181-0/+45
| | | | | | | | Test doesn't actually check the output. I need to fix add i64 being matched for the addressing calculations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195040 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Move patterns to match add / sub to scalar instructionsMatt Arsenault2013-11-184-20/+24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195034 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Enable the IR structurizer by defaultTom Stellard2013-11-183-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195031 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Fix a crash in the AMDILCFGStrucurizerTom Stellard2013-11-181-0/+62
| | | | | | | The ifPatternMatch() function was not correctly reporting the number of matches in some cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195030 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Fix illegal VGPR->SGPR copy inside of loopTom Stellard2013-11-181-0/+31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195026 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Fix another case of illegal VGPR->SGPR copyTom Stellard2013-11-181-0/+26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195025 91177308-0d34-0410-b5e6-96231b3b80d8
* [PR17978] Mark two ARM/fast-isel tests as XFAIL:vg_leak due to GV.NAKAMURA Takumi2013-11-182-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195010 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Fix 'ran out of registers' in MIPS32 with FP64 when generating code ↵Daniel Sanders2013-11-181-0/+31
| | | | | | | | | | | | for (ConstantFP 0.0) Fixed an inappropriate use of BuildPairF64 when compiling for MIPS32 with FP64 which resulted in an impossible constraint on the register allocation. It now uses BuildPairF64_64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195007 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement the newly added ACLE functions for ld1/st1 with 2/3/4 vectors.Hao Liu2013-11-182-101/+1269
| | | | | | | The functions are like: vst1_s8_x2 ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194990 91177308-0d34-0410-b5e6-96231b3b80d8
* Testcase for PR17964Bill Wendling2013-11-171-0/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194961 91177308-0d34-0410-b5e6-96231b3b80d8
* DAGCombiner: Partially revert r192795, getNOT was fixed not to create ↵Benjamin Kramer2013-11-171-0/+2
| | | | | | illegal constants. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194959 91177308-0d34-0410-b5e6-96231b3b80d8
* Added a size field to the stack map record to handle subregister spills.Andrew Trick2013-11-172-60/+132
| | | | | | | | Implementing this on bigendian platforms could get strange. I added a target hook, getStackSlotRange, per Jakob's recommendation to make this as explicit as possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194942 91177308-0d34-0410-b5e6-96231b3b80d8
* Use right address space pointer sizeMatt Arsenault2013-11-171-0/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194940 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix assert on unaligned access to global with different address space size.Matt Arsenault2013-11-161-1/+23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194934 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix codegen for null different sized pointer.Matt Arsenault2013-11-161-0/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194932 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Make dot_4 instructions predicableVincent Lejeune2013-11-161-0/+27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194927 91177308-0d34-0410-b5e6-96231b3b80d8
* Implemented aarch64 Neon scalar vmulx_lane intrinsicsAna Pazos2013-11-153-12/+238
| | | | | | | | | | | | | | | | Implemented aarch64 Neon scalar vfma_lane intrinsics Implemented aarch64 Neon scalar vfms_lane intrinsics Implemented legacy vmul_n_f64, vmul_lane_f64, vmul_laneq_f64 intrinsics (v1f64 parameter type) using Neon scalar instructions. Implemented legacy vfma_lane_f64, vfms_lane_f64, vfma_laneq_f64, vfms_laneq_f64 intrinsics (v1f64 parameter type) using Neon scalar instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194888 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Fix the scalar NEON ACLE functions so that they return float/doubleChad Rosier2013-11-151-24/+16
| | | | | | rather than the vector equivalent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194853 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid illegal integer promotion in fastiselBob Wilson2013-11-153-0/+72
| | | | | | | | | | | | | | | | | Stop folding constant adds into GEP when the type size doesn't match. Otherwise, the adds' operands are effectively being promoted, changing the conditions of an overflow. Results are different when: sext(a) + sext(b) != sext(a + b) Problem originally found on x86-64, but also fixed issues with ARM and PPC, which used similar code. <rdar://problem/15292280> Patch by Duncan Exon Smith! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194840 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Add VReg_96 register class to SIRegisterInfo::hasVGPRs()Tom Stellard2013-11-151-0/+46
| | | | | | This fixes a crash with GNOME settings manager. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194836 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Merge basic_operations_little.ll into basic_operations.ll.Daniel Sanders2013-11-152-639/+184
| | | | | | | | | Now that FileCheck supports multiple check prefixes, we don't need to keep the little and big endian versions of this test separate anymore. Merge them back together. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194826 91177308-0d34-0410-b5e6-96231b3b80d8
* Add AVX512 unmasked FMA intrinsics and support.Cameron McInally2013-11-151-0/+97
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194824 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix illegal DAG produced by SelectionDAG::getConstant() for v2i64 typeDaniel Sanders2013-11-159-26/+134
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: When getConstant() is called for an expanded vector type, it is split into multiple scalar constants which are then combined using appropriate build_vector and bitcast operations. In addition to the usual big/little endian differences, the case where the element-order of the vector does not have the same endianness as the elements themselves is also accounted for. For example, for v4i32 on big-endian MIPS, the byte-order of the vector is <3210,7654,BA98,FEDC>. For little-endian, it is <0123,4567,89AB,CDEF>. Handling this case turns out to be a nop since getConstant() returns a splatted vector (so reversing the element order doesn't change the value) This fixes a number of cases in MIPS MSA where calling getConstant() during operation legalization introduces illegal types (e.g. to legalize v2i64 UNDEF into a v2i64 BUILD_VECTOR of illegal i64 zeros). It should also handle bigger differences between illegal and legal types such as legalizing v2i64 into v8i16. lowerMSASplatImm() in the MIPS backend no longer needs to avoid calling getConstant() so this function has been updated in the same patch. For the sake of transparency, the steps I've taken since the review are: * Added 'virtual' to isVectorEltOrderLittleEndian() as requested. This revealed that the MIPS tests were falsely passing because a polymorphic function was not actually polymorphic in the reviewed patch. * Fixed the tests that were now failing. This involved deleting the code to handle the MIPS MSA element-order (which was previously doing an byte-order swap instead of an element-order swap). This left isVectorEltOrderLittleEndian() unused and it was deleted. * Fixed build failures caused by rebasing beyond r194467-r194472. These build failures involved the bset, bneg, and bclr instructions added in these commits using lowerMSASplatImm() in a way that was no longer valid after this patch. Some of these were fixed by calling SelectionDAG::getConstant() instead, others were fixed by a new function getBuildVectorSplat() that provided the removed functionality of lowerMSASplatImm() in a more sensible way. Reviewers: bkramer Reviewed By: bkramer CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D1973 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194811 91177308-0d34-0410-b5e6-96231b3b80d8
* [NVPTX] Fix handling of indirect callsJustin Holewinski2013-11-151-0/+10
| | | | | | Using a special machine node is cleaner than an InlineAsm node, and fixes an assertion failure in InstrEmitter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194810 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Build all the tests in little and big endian modes and correct ↵Daniel Sanders2013-11-1559-3/+666
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | an incorrect test. Summary: This patch (correctly) breaks some MSA tests by exposing the cases when SelectionDAG::getConstant() produces illegal types. These have been temporarily marked XFAIL and the XFAIL flag will be removed when SelectionDAG::getConstant() is fixed. There are three categories of failure: * Immediate instructions are not selected in one endian mode. * Immediates used in ldi.[bhwd] must be different according to endianness. (this only affects cases where the 'wrong' ldi is used to load the correct bitpattern. E.g. (bitcast:v2i64 (build_vector:v4i32 ...))) * Non-immediate instructions that rely on immediates affected by the previous two categories as part of their match pattern. For example, the bset match pattern is the vector equivalent of 'ws | (1 << wt)'. One test needed correcting to expect different output depending on whether big or little endian was in use. This test was test/CodeGen/Mips/msa/basic_operations.ll and experiences the second category of failure shown above. The little endian version of this test is named basic_operations_little.ll and will be merged back into basic_operations.ll in a follow up commit now that FileCheck supports multiple check prefixes. Reviewers: bkramer, jacksprat, dsanders Reviewed By: dsanders CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D1972 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194806 91177308-0d34-0410-b5e6-96231b3b80d8
* Redirect unused test case output to /dev/nullAlexey Samsonov2013-11-151-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194798 91177308-0d34-0410-b5e6-96231b3b80d8
* Platform proof a test case.Andrew Trick2013-11-151-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194788 91177308-0d34-0410-b5e6-96231b3b80d8
* Add target hook to prevent folding some bitcasted loads.Matt Arsenault2013-11-151-0/+42
| | | | | | | | | | | | | This is to avoid this transformation in some cases: fold (conv (load x)) -> (load (conv*)x) On architectures that don't natively support some vector loads efficiently casting the load to a smaller vector of larger types and loading is more efficient. Patch by Micah Villmow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194783 91177308-0d34-0410-b5e6-96231b3b80d8
* Make all the conditional Mips 16 branches get initially set for theReed Kotler2013-11-154-0/+86
| | | | | | | | | | | | short form. Constant islands will expand them if they are out of range. Since there is not direct object emitter at this time, it does not have any material affect because the assembler sorts this out. But we need to know for the actual constant island work. We track the difference by putting # 16 inst in the comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194766 91177308-0d34-0410-b5e6-96231b3b80d8
* Add addrspacecast instruction.Matt Arsenault2013-11-151-4/+4
| | | | | | Patch by Michele Scandale! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194760 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Fix scheduling of instructions that use the LDS output queueTom Stellard2013-11-152-3/+104
| | | | | | | | | | | | | | | | | | | | | | | | | The LDS output queue is accessed via the OQAP register. The OQAP register cannot be live across clauses, so if value is written to the output queue, it must be retrieved before the end of the clause. With the machine scheduler, we cannot statisfy this constraint, because it lacks proper alias analysis and it will mark some LDS accesses as having a chain dependency on vertex fetches. Since vertex fetches require a new clauses, the dependency may end up spiltting OQAP uses and defs so the end up in different clauses. See the lds-output-queue.ll test for a more detailed explanation. To work around this issue, we now combine the LDS read and the OQAP copy into one instruction and expand it after register allocation. This patch also adds some checks to the EmitClauseMarker pass, so that it doesn't end a clause with a value still in the output queue and removes AR.X and OQAP handling from the scheduler (AR.X uses and defs were already being expanded post-RA, so the scheduler will never see them). Reviewed-by: Vincent Lejeune <vljn at ovi.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194755 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify testcase.Eric Christopher2013-11-141-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194748 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: produce friendly error for invalid inline asmTim Northover2013-11-141-0/+16
| | | | | | | | | We used to perform an invalid operation on an MVT and crash, which wasn't much fun. Patch by Oliver Stannard. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194714 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a triple and switch test to FileCheck.Rafael Espindola2013-11-141-1/+8
| | | | | | | On windows we don't print .weak for function definitions, so count was only finding 1 'weak'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194713 91177308-0d34-0410-b5e6-96231b3b80d8
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