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* The X86 backend has a number of optimizations for SETCC nodes which useNadav Rotem2012-08-182-2/+47
* Make atomic load and store of pointers work. Tighten verification of atomic ...Eli Friedman2012-08-171-0/+22
* Avoid folding ADD instructions with FI operands.Jakob Stoklund Olesen2012-08-171-0/+11
* TargetLowering: Use the large shift amount during legalize types. The legaliz...Benjamin Kramer2012-08-171-0/+32
* Fix broken check lines.Benjamin Kramer2012-08-175-17/+17
* Implement NEON domain switching for scalar <-> S-register vmovs on ARMTim Northover2012-08-171-32/+32
* Add ADD and SUB to the predicable ARM instructions.Jakob Stoklund Olesen2012-08-163-21/+35
* [arm-fast-isel] Add support for fastcc.Jush Lu2012-08-161-0/+66
* Test case for r162008.Akira Hatanaka2012-08-161-0/+12
* Fold predicable instructions into MOVCC / t2MOVCC.Jakob Stoklund Olesen2012-08-152-1/+61
* Rework test so that it reproduces the error without the horrible flag.Bill Wendling2012-08-151-8/+2
* Remove invalid test. This test requires that dead basic blocks be keptBill Wendling2012-08-151-19/+0
* Use vld1/vst1 to load/store f64 if alignment is < 4 and the target allows una...Evan Cheng2012-08-151-17/+49
* The names of VFP variants of half-to-float conversion instructions wereAnton Korobeynikov2012-08-141-3/+3
* fix PR11334Michael Liao2012-08-141-0/+56
* During the CodeGenPrepare we often lower intrinsics (such as objsize)Nadav Rotem2012-08-145-15/+16
* llvm/test/CodeGen/ARM/floorf.ll: Add explicit -mtriple=arm-unknown-unknown, o...NAKAMURA Takumi2012-08-141-1/+1
* Add a roundToIntegral method to APFloat, which can be parameterized over vari...Owen Anderson2012-08-131-0/+29
* Rename test since it's not linux-specific.Bill Wendling2012-08-131-0/+0
* Handle extra Tail predecessors in if-conversion.Jakob Stoklund Olesen2012-08-131-0/+30
* [Hexagon] Don't mark callee saved registers as clobbered by a tail callArnold Schwaighofer2012-08-131-0/+14
* Fix failure on Atom bot due to r161769Manman Ren2012-08-131-1/+1
* Do not optimize (or (and X,Y), Z) into BFI and other sequences if the AND ISD...Nadav Rotem2012-08-131-0/+17
* X86: move Int_CVTSD2SSrr, Int_CVTSI2SSrr, Int_CVTSI2SDrr, Int_CVTSS2SDrr fromManman Ren2012-08-131-0/+14
* Add support for the %H output modifier.Eric Christopher2012-08-131-0/+9
* Add test for previous commit correcting NEON load patterns.Tim Northover2012-08-131-0/+102
* Revert 161581: Patch to implement UMLAL/SMLAL instructions for the ARMArnold Schwaighofer2012-08-122-88/+0
* fix PR13577, an issue introduced by r161687Michael Liao2012-08-111-0/+8
* PR13578: Teach MachineCSE that instructions that use a constant register can ...Benjamin Kramer2012-08-112-2/+24
* X86: when we are auto-detecting the subtarget features, make sure we turn onManman Ren2012-08-101-1/+3
* The normal edge of an invoke is not allowed to branch to a block with aEli Friedman2012-08-101-19/+0
* add X86-specific DAG optimization to simplify boolean testMichael Liao2012-08-101-0/+42
* Update edge weights correctly in replaceSuccessor().Jakob Stoklund Olesen2012-08-101-1/+1
* Reapply r161633-161634 "Partition use lists so defs always come before uses.""Jakob Stoklund Olesen2012-08-102-2/+2
* Revert r161633-161634 "Partition use lists so defs always come before uses."Jakob Stoklund Olesen2012-08-092-2/+2
* Partition use lists so defs always come before uses.Jakob Stoklund Olesen2012-08-092-3/+3
* Don't use pointer-pointers for the register use lists.Jakob Stoklund Olesen2012-08-092-3/+3
* Don't modify MO while use_iterator is still pointing to it.Jakob Stoklund Olesen2012-08-091-0/+1
* Patch to implement UMLAL/SMLAL instructions for the ARM architectureArnold Schwaighofer2012-08-092-0/+88
* Fix the legalization of ExtLoad on ARM. ExpandUnalignedLoad did not properly Nadav Rotem2012-08-091-0/+12
* Add test triples to fix win32 failures. Revert workaround from r161292.Bob Wilson2012-08-0810-22/+22
* X86: enable CSE between CMP and SUBManman Ren2012-08-081-0/+23
* X86 cmp lowering is looking past truncate on the condition node. It should onlyEvan Cheng2012-08-071-0/+36
* Add a much more conservative strategy for aligning branch targets.Chandler Carruth2012-08-073-5/+10
* MachineCSE: Update the heuristics for isProfitableToCSE.Manman Ren2012-08-072-1/+36
* MFTB on PPC64 should really be encoded using MFSPR.Hal Finkel2012-08-061-1/+1
* Implement proper handling for pcmpistri/pcmpestri intrinsics. Requires custom...Craig Topper2012-08-061-10/+10
* Update test to check for r161305Craig Topper2012-08-051-0/+2
* Add readcyclecounter lowering on PPC64.Hal Finkel2012-08-041-0/+15
* Add stack spill / reload instructions for DTriple and DQuad register classes,...Anton Korobeynikov2012-08-041-0/+174