aboutsummaryrefslogtreecommitdiffstats
path: root/test/CodeGen
Commit message (Expand)AuthorAgeFilesLines
* Disable this test for now...Daniel Dunbar2011-02-111-0/+3
* Fix buggy fcopysign lowering.Evan Cheng2011-02-111-13/+40
* Add mips o32 tests again with the hope that the buildbot won't complaint againBruno Cardoso Lopes2011-02-101-0/+322
* Remove the test to silence the buildbot, will check it in again with a proper...Bruno Cardoso Lopes2011-02-101-321/+0
* Fix a lot of o32 CC issues and add a bunch of tests. Patch by Akira Hatanaka ...Bruno Cardoso Lopes2011-02-101-0/+321
* ptx: add passing parameter to kernel functionsChe-Liang Chiou2011-02-101-1/+8
* After 3-addressifying a two-address instruction, update the register maps; ad...Evan Cheng2011-02-101-10/+22
* Add intrinsic for setc instruction on the XCore.Richard Osborne2011-02-091-0/+14
* PostRA antidependence breaker unit test for PR8986.Andrew Trick2011-02-081-0/+89
* PostRA antidependence breaker unit test for rdar://8959122.Andrew Trick2011-02-081-0/+128
* Fix an obvious typo which caused an isel assertion. rdar://8964854.Evan Cheng2011-02-071-0/+17
* Reduce test case, smaller is better.Devang Patel2011-02-071-789/+33
* Add codegen support for using post-increment NEON load/store instructions.Bob Wilson2011-02-0711-0/+381
* Rework some .ARM.attribute work for improved gcc compatibility.Jason W Kim2011-02-072-17/+35
* Target/X86: Tweak allocating shadow area (aka home) on Win64. It must be enou...NAKAMURA Takumi2011-02-054-20/+17
* Move a test that ended up in the wrong place.Bob Wilson2011-02-052-18/+18
* Merge .debug_loc entries whenever possible to reduce debug_loc size.Devang Patel2011-02-041-0/+827
* Mark that the return is using EAX so that we don't use it for some otherNick Lewycky2011-02-041-0/+14
* DebugLoc associated with a machine instruction is used to emit location entri...Devang Patel2011-02-042-2/+72
* Add XCore intrinsics for resource instructions.Richard Osborne2011-02-031-0/+97
* Add -march to fix the bots.Rafael Espindola2011-02-031-1/+1
* Fix PR9127 by reversing the operands even if they have more then one use.Rafael Espindola2011-02-031-0/+12
* Add support for trampolines on the XCore.Richard Osborne2011-02-021-0/+37
* Given a pair of floating point load and store, if there are no other uses ofEvan Cheng2011-02-021-0/+28
* Keep track of incoming argument's location while emitting LiveIns.Devang Patel2011-01-311-0/+84
* Fix bug where ReduceLoadWidth was creating illegal ZEXTLOAD instructions.Richard Osborne2011-01-311-0/+10
* Teach DAGCombine to fold fold (sra (trunc (sr x, c1)), c2) -> (trunc (sra x, ...Benjamin Kramer2011-01-301-0/+9
* Re-apply r124518 with fix. Watch out for invalidated iterator.Evan Cheng2011-01-291-5/+6
* Revert r124518. It broke Linux self-host.Evan Cheng2011-01-291-6/+5
* Re-commit r124462 with fixes. Tail recursion elim will now dup ret into uncon...Evan Cheng2011-01-291-5/+6
* Revert r124462. There are a few big regressions that I need to fix first.Evan Cheng2011-01-281-6/+5
* Add a triple.Rafael Espindola2011-01-281-1/+1
* Print the visibility of declarations.Rafael Espindola2011-01-281-0/+11
* - Stop simplifycfg from duplicating "ret" instructions into unconditionalEvan Cheng2011-01-282-55/+6
* Add a testcase for my last checkin.Eric Christopher2011-01-271-0/+21
* Target/X86: Tweak win64's tailcall.NAKAMURA Takumi2011-01-262-6/+34
* Fix whitespace.NAKAMURA Takumi2011-01-261-1/+0
* Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrini...Devang Patel2011-01-251-1/+0
* Don't merge restore with tail call instruction.Evan Cheng2011-01-251-0/+22
* Speculatively revert r124138.Devang Patel2011-01-241-0/+1
* Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrini...Devang Patel2011-01-241-0/+103
* fix a missing shuffle pattern, PR9009. Patch by Artiom Myaskouvskey!Chris Lattner2011-01-241-0/+9
* Pass sret arguments through the stack instead of through registers in Sparc b...Venkatraman Govindaraju2011-01-221-0/+36
* Added ICC, FCC as uses of movcc instruction to generate correct code when -ma...Venkatraman Govindaraju2011-01-221-22/+51
* Sparc backend: Venkatraman Govindaraju2011-01-211-16/+34
* Last round of fixes for movw + movt global address codegen.Evan Cheng2011-01-216-39/+65
* Implement support for byval arguments in Sparc backend.Venkatraman Govindaraju2011-01-211-0/+18
* Enable support for precise scheduling of the instruction selectionAndrew Trick2011-01-212-6/+11
* Convert -enable-sched-cycles and -enable-sched-hazard to -disableAndrew Trick2011-01-214-17/+17
* Don't be overly aggressive with CSE of "ldr constantpool". If it's a pc-relativeEvan Cheng2011-01-201-2/+6