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* Fix pr11266.Nadav Rotem2011-10-302-2/+34
* Stabilize the test by specifying an exact cpu targetNadav Rotem2011-10-301-1/+1
* Add a new DAGCombine optimization for BUILD_VECTOR.Nadav Rotem2011-10-293-5/+23
* Force SSE for this test.Benjamin Kramer2011-10-291-1/+1
* Revert r143206, as there are still some failing tests.Dan Gohman2011-10-2911-51/+29
* test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll: [PR11218] Mark "REQUI...NAKAMURA Takumi2011-10-281-0/+4
* Reapply r143177 and r143179 (reverting r143188), with schedulerDan Gohman2011-10-2811-29/+51
* Dwarf: [PR11022] Fix emitting DW_AT_const_value(>i64), to be host-endian-neut...NAKAMURA Takumi2011-10-281-1/+1
* test/CodeGen/X86/2010-08-10-DbgConstant.ll: Add explicit -mtriple=i686-linux....NAKAMURA Takumi2011-10-281-1/+1
* Speculatively disable Dan's commits 143177 and 143179 to see ifDuncan Sands2011-10-2810-32/+29
* Always use the string pool, even when it makes the .o larger. This may helpNick Lewycky2011-10-286-10/+6
* Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUWDan Gohman2011-10-2812-183/+32
* Remove the Alpha backend.Dan Gohman2011-10-2742-860/+0
* Also set addrmode6 alignment when align==size.Jakob Stoklund Olesen2011-10-273-5/+15
* Avoid partial CPSR dependency from loop backedges. rdar://10357570Evan Cheng2011-10-271-2/+36
* Changed test to check for correct load size instead of shift as the shift mig...Pete Cooper2011-10-271-1/+1
* Teach our Dwarf emission to use the string pool.Nick Lewycky2011-10-272-5/+5
* Don't crash on 128-bit sdiv by constant. Found by inspection.Eli Friedman2011-10-271-0/+24
* A branch predicated on a constant can just FastEmit an unconditional branch.Chad Rosier2011-10-271-0/+47
* Run test with -verify-machineinstrs.Rafael Espindola2011-10-261-2/+2
* Fixes an issue reported by -verify-machineinstrs.Rafael Espindola2011-10-261-5/+10
* This commit introduces two fake instructions MORESTACK_RET andRafael Espindola2011-10-261-1/+1
* Make sure short memsets on ARM lower to stores, even when optimizing for size.Lang Hames2011-10-261-0/+18
* Thumb2 remove redundant ".w" suffix from t2MVNCCi pattern.Jim Grosbach2011-10-261-1/+1
* Revert r142530 at least temporarily while a discussion is had on llvm-commits...James Molloy2011-10-261-26/+0
* Revert part of r142530. The patch potentially hurts performance especiallyEvan Cheng2011-10-261-1/+0
* Remove the Blackfin backend.Dan Gohman2011-10-2553-1363/+0
* Remove the SystemZ backend.Dan Gohman2011-10-2468-2502/+0
* Don't crash on variable insertelement on ARM. PR10258.Eli Friedman2011-10-241-0/+7
* Check the visibility of the global variable before placing it into the stubsBill Wendling2011-10-241-0/+36
* Remove the explicit request for "Latency" scheduling from MSP430,Dan Gohman2011-10-242-2/+2
* Change the default scheduler from Latency to ILP, since LatencyDan Gohman2011-10-2417-233/+183
* Completely re-write the algorithm behind MachineBlockPlacement based onChandler Carruth2011-10-231-2/+1
* Fix pr11193.Nadav Rotem2011-10-221-0/+15
* Fix pr11194. When promoting and splitting integers we need to useNadav Rotem2011-10-211-0/+19
* Don't hard code the desired alignment for loops -- it isn't 16-bytes onChandler Carruth2011-10-211-3/+3
* 1. Fix the widening of SETCC in WidenVecOp_SETCC. Use the correct return CC t...Nadav Rotem2011-10-211-0/+30
* Add loop aligning to MachineBlockPlacement based on review discussion soChandler Carruth2011-10-211-2/+69
* Add a very basic test for MachineBlockPlacement. This is essentially theChandler Carruth2011-10-211-0/+75
* Remove intrinsics for X86 BLSI, BLSMSK, and BLSR intrinsics and replace with ...Craig Topper2011-10-211-24/+18
* Revert 142337. Thumb1 still doesn't support dynamic stack realignment. :(Chad Rosier2011-10-201-40/+0
* Fix TLS lowering bug. The CopyFromReg must be glued to the TLSCALL. rdar://10...Evan Cheng2011-10-191-0/+17
* Improve code generation for vselect on SSE2:Nadav Rotem2011-10-191-6/+11
* Use literal pool loads instead of MOVW/MOVT for materializing global addresse...James Molloy2011-10-191-0/+27
* Add support for the vector-widening of vselect and vector-setccNadav Rotem2011-10-191-0/+68
* Rename PEXTR to PEXT. Add intrinsics for BMI instructions.Craig Topper2011-10-191-1/+128
* Added testcase for <rdar://problem/10215997>Lang Hames2011-10-181-0/+29
* Add additional element-promotion tests.Nadav Rotem2011-10-181-0/+31
* Fix a bug in the legalization of vector anyext-load and trunc-store. Mem Inde...Nadav Rotem2011-10-181-0/+28
* Fix incorrect check for sign-extended constant BUILD_VECTOR.Bob Wilson2011-10-181-0/+11