| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | llvm/test/CodeGen/X86/ms-inline-asm.ll: Fixup; Globals doesn't have leading u... | NAKAMURA Takumi | 2013-01-10 | 1 | -2/+2 |
| * | PR14896: Handle memcpy from constant string where the memcpy size is larger t... | Evan Cheng | 2013-01-10 | 1 | -0/+13 |
| * | [ms-inline asm] Add support for calling functions from inline assembly. | Chad Rosier | 2013-01-10 | 1 | -0/+18 |
| * | Stack Alignment: throw error if we can't satisfy the minimal alignment | Manman Ren | 2013-01-10 | 2 | -1/+20 |
| * | Fix a DAG combine bug visitBRCOND() is transforming br(xor(x, y)) to br(x != y). | Evan Cheng | 2013-01-09 | 1 | -0/+41 |
| * | add -march to the test | Nadav Rotem | 2013-01-09 | 1 | -1/+1 |
| * | Efficient lowering of vector sdiv when the divisor is a splatted power of two... | Nadav Rotem | 2013-01-09 | 1 | -0/+72 |
| * | MIsched: add an ILP window property to machine model. | Andrew Trick | 2013-01-09 | 1 | -13/+20 |
| * | Specify complete triple for fp128 tests. | Tim Northover | 2013-01-08 | 2 | -2/+2 |
| * | Pad Short Functions for Intel Atom | Preston Gurd | 2013-01-08 | 4 | -5/+83 |
| * | Allow the asm printer to print fp128 values properly. | Tim Northover | 2013-01-08 | 2 | -0/+18 |
| * | This patch addresses bug 14678 by fixing two problems in medium code model | Bill Schmidt | 2013-01-07 | 2 | -0/+51 |
| * | Make the MergeGlobals pass correctly handle the address space qualifiers of t... | Silviu Baranga | 2013-01-07 | 1 | -0/+12 |
| * | Fix suffix handling for parsing and printing of cvtsi2ss, cvtsi2sd, cvtss2si,... | Craig Topper | 2013-01-06 | 3 | -5/+5 |
| * | Fix for PR14739. It's not safe to fold a load into a call across a store. Tha... | Evan Cheng | 2013-01-06 | 1 | -4/+21 |
| * | Recommit r171461 which was incorrectly reverted. Mark DIV/IDIV instructions h... | Craig Topper | 2013-01-05 | 1 | -0/+31 |
| * | Revert revision 171524. Original message: | Nadav Rotem | 2013-01-05 | 4 | -76/+5 |
| * | The current Intel Atom microarchitecture has a feature whereby when a function | Preston Gurd | 2013-01-04 | 4 | -5/+76 |
| * | [mips] MipsTargetLowering::getSetCCResultType should return a vector type if | Akira Hatanaka | 2013-01-04 | 1 | -0/+16 |
| * | Revert revision: 171467. This transformation is incorrect and makes some test... | Nadav Rotem | 2013-01-04 | 1 | -15/+0 |
| * | Simplified TRUNCATE operation that comes after SETCC. It is possible since SE... | Elena Demikhovsky | 2013-01-03 | 1 | -0/+15 |
| * | Revert "Mark DIV/IDIV instructions hasSideEffects=1 because they can trap whe... | Michael Gottesman | 2013-01-03 | 1 | -32/+0 |
| * | Mark DIV/IDIV instructions hasSideEffects=1 because they can trap when dividi... | Craig Topper | 2013-01-03 | 1 | -0/+32 |
| * | Fix PR14732 by handling all kinds of IMPLICIT_DEF live ranges. | Jakob Stoklund Olesen | 2013-01-03 | 1 | -0/+130 |
| * | DAGCombiner: Avoid generating illegal vector INT_TO_FP nodes | Tom Stellard | 2013-01-02 | 3 | -3/+37 |
| * | AVX: Fix a bug in WidenMaskArithmetic. | Nadav Rotem | 2013-01-02 | 2 | -8/+32 |
| * | Support ppcf128 in SelectionDAG::getConstantFP | Hal Finkel | 2012-12-30 | 1 | -0/+15 |
| * | Tests: rewrite 'opt ... %s' to 'opt ... < %s' so that opt does not emit a Mod... | Dmitri Gribenko | 2012-12-30 | 2 | -2/+2 |
| * | AVX: Move the ZEXT/ANYEXT DAGCo optimizations to the lowering of these optimi... | Nadav Rotem | 2012-12-28 | 1 | -2/+1 |
| * | On AVX/AVX2 the type v8i1 is legalized to v8i16, which is an XMM sized | Nadav Rotem | 2012-12-27 | 1 | -0/+38 |
| * | llvm/test/CodeGen/X86: FileCheck-ize two tests in r171083. | NAKAMURA Takumi | 2012-12-26 | 2 | -2/+17 |
| * | llvm/test/CodeGen/X86: Disable avx in two tests corresponding to r171082. | NAKAMURA Takumi | 2012-12-26 | 2 | -2/+2 |
| * | Loosen scheduling restrictions on the PPC dcbt intrinsic | Hal Finkel | 2012-12-25 | 1 | -0/+22 |
| * | Expand PPC64 atomic load and store | Hal Finkel | 2012-12-25 | 1 | -0/+20 |
| * | Harden test so it's not affected by changes to compare lowering. | Benjamin Kramer | 2012-12-25 | 1 | -1/+1 |
| * | X86: Shave off one shuffle from the pcmpeqq sequence for SSE2 by making use o... | Benjamin Kramer | 2012-12-25 | 1 | -4/+2 |
| * | X86: Custom lower <2 x i64> eq and ne when SSE41 is not available. | Benjamin Kramer | 2012-12-25 | 1 | -0/+26 |
| * | llvm/test/CodeGen/X86/fold-vex.ll: Add explicit triple. | NAKAMURA Takumi | 2012-12-24 | 1 | -1/+1 |
| * | Some x86 instructions can load/store one of the operands to memory. On SSE, t... | Nadav Rotem | 2012-12-24 | 1 | -0/+16 |
| * | X86: Turn mul of <4 x i32> into pmuludq when no SSE4.1 is available. | Benjamin Kramer | 2012-12-22 | 1 | -0/+14 |
| * | X86: Emit vector sext as shuffle + sra if vpmovsx is not available. | Benjamin Kramer | 2012-12-22 | 1 | -23/+96 |
| * | In some cases, due to scheduling constraints we copy the EFLAGS. | Nadav Rotem | 2012-12-21 | 1 | -0/+37 |
| * | try to unbreak ppc buildbots. | Benjamin Kramer | 2012-12-21 | 1 | -4/+4 |
| * | X86: Match pmin/pmax as a target specific dag combine. This occurs during vec... | Benjamin Kramer | 2012-12-21 | 2 | -3/+2790 |
| * | R600: Expand vec4 INT <-> FP conversions | Tom Stellard | 2012-12-21 | 1 | -0/+52 |
| * | Add test case for r170674 | Reed Kotler | 2012-12-21 | 1 | -0/+29 |
| * | Move these files over to the debug info directory. | Eric Christopher | 2012-12-21 | 2 | -112/+0 |
| * | Revert "Adding support for llvm.arm.neon.vaddl[su].* and" | Bob Wilson | 2012-12-20 | 2 | -128/+0 |
| * | On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr, | Evan Cheng | 2012-12-20 | 1 | -13/+69 |
| * | Simplify the testcase a bit. | Rafael Espindola | 2012-12-20 | 1 | -15/+4 |
