| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | This reverts r155000. | Joey Gouly | 2013-06-20 | 1 | -4/+0 |
| * | ARM: Correct printing of pre-indexed operands. | Quentin Colombet | 2013-04-12 | 1 | -0/+42 |
| * | Specify cpu to unbreak tests. | Evan Cheng | 2012-04-26 | 1 | -1/+1 |
| * | Fixed decoding for the ARM cdp2 instruction. The restriction on the coprocess... | Silviu Baranga | 2012-04-18 | 1 | -0/+3 |
| * | Added soft fail checks for the disassembler when decoding some corner cases o... | Silviu Baranga | 2012-03-22 | 1 | -1/+1 |
| * | ARM VLDR/VSTR instructions don't need a size suffix. | Jim Grosbach | 2011-11-14 | 1 | -1/+1 |
| * | Fix the issue that r143552 was trying to address the _right_ way. One-regist... | Owen Anderson | 2011-11-02 | 1 | -0/+4 |
| * | Revert r142618, r142622, and r142624, which were based on an incorrect readin... | Owen Anderson | 2011-10-20 | 1 | -0/+6 |
| * | Fix decoding tests for fixed MSR encodings. | Owen Anderson | 2011-10-20 | 1 | -6/+0 |
| * | Update test for r141704. | Jim Grosbach | 2011-10-11 | 1 | -3/+3 |
| * | Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds p... | James Molloy | 2011-09-07 | 1 | -1/+1 |
| * | STC2L_POST and STC2L_POST should be handled the same as STCL_POST/LDC_POST fo... | Owen Anderson | 2011-08-18 | 1 | -0/+3 |
| * | Fix the decoding of RFE instruction. RFEs have the load bit set, while SRSs ... | Owen Anderson | 2011-08-18 | 1 | -0/+3 |
| * | Add testcase for STRH. Patch by James Molloy. | Owen Anderson | 2011-08-15 | 1 | -0/+3 |
| * | Fix decoding for indexed STRB and LDRB. Fixes <rdar://problem/9926161>. | Owen Anderson | 2011-08-11 | 1 | -0/+3 |
| * | Correct immediate range for shifter operands. Patch by James Molloy, with ad... | Owen Anderson | 2011-08-11 | 1 | -0/+3 |
| * | ARM Disassembler: sign extend branch immediates. | Benjamin Kramer | 2011-08-09 | 1 | -0/+3 |
| * | Replace the existing ARM disassembler with a new one based on the FixedLenDec... | Owen Anderson | 2011-08-09 | 1 | -3/+6 |
| * | ARM refactoring assembly parsing of memory address operands. | Jim Grosbach | 2011-08-03 | 1 | -2/+5 |
| * | ARM SRS instruction parsing, diassembly and encoding support. | Jim Grosbach | 2011-07-29 | 1 | -0/+6 |
| * | Tweak ARM assembly parsing and printing of MSR instruction. | Jim Grosbach | 2011-07-19 | 1 | -2/+2 |
| * | Simplify printing of ARM shifted immediates. | Jim Grosbach | 2011-07-11 | 1 | -4/+4 |
| * | Fix Bug 9386 - ARM disassembler failed to disassemble conditional bx | Johnny Chen | 2011-05-22 | 1 | -0/+3 |
| * | Add tests for A8.6.110 NOP. | Johnny Chen | 2011-04-27 | 1 | -0/+3 |
| * | Hanlde the checking of bad regs for SMMLAR properly, instead of asserting. | Johnny Chen | 2011-04-08 | 1 | -0/+3 |
| * | MOVi16 and MOVTi16 does not allow pc as the dest register, while MOVi allows it. | Johnny Chen | 2011-04-08 | 1 | -0/+6 |
| * | Add sanity checking for bad register specifier(s) for the DPFrm instructions. | Johnny Chen | 2011-04-08 | 1 | -0/+18 |
| * | Add sanity checking for invalid register encodings for signed/unsigned extend... | Johnny Chen | 2011-04-07 | 1 | -0/+6 |
| * | Add some more comments about checkings of invalid register numbers. | Johnny Chen | 2011-04-07 | 1 | -0/+3 |
| * | Add a missing opcode (SMLSLDX) to BadRegsMulFrm() function. | Johnny Chen | 2011-04-06 | 1 | -1/+4 |
| * | Fix a typo in the handling of PKHTB opcode, plus add sanity check for illegal... | Johnny Chen | 2011-04-05 | 1 | -3/+6 |
| * | The r128085 checkin modified the operand ordering for MRC/MRC2 instructions. | Johnny Chen | 2011-04-05 | 1 | -0/+3 |
| * | LDRD now prints out two dst registers. | Johnny Chen | 2011-04-05 | 1 | -1/+1 |
| * | Constants with multiple encodings (ARM): | Johnny Chen | 2011-04-05 | 1 | -3/+3 |
| * | Fixed a bug in disassembly of STR_POST, where the immediate is the second ope... | Johnny Chen | 2011-04-02 | 1 | -0/+3 |
| * | Fix the instruction table entries for AI1_adde_sube_s_irs multiclass definiti... | Johnny Chen | 2011-04-01 | 1 | -0/+7 |
| * | Fix a LDRT/LDRBT decoding bug where for Encoding A2, if Inst{4} != 0, we shou... | Johnny Chen | 2011-04-01 | 1 | -0/+3 |
| * | Fix LDRi12 immediate operand, which was changed to be the second operand in $... | Johnny Chen | 2011-04-01 | 1 | -0/+9 |
| * | Add BLXi to the instruction table for disassembly purpose. | Johnny Chen | 2011-03-31 | 1 | -0/+3 |
| * | Add a test case for MSRi. | Johnny Chen | 2011-03-29 | 1 | -0/+3 |
| * | A8.6.188 STC, STC2 | Johnny Chen | 2011-03-29 | 1 | -0/+6 |
| * | Add and modify some tests. | Johnny Chen | 2011-03-29 | 1 | -0/+6 |
| * | Get rid of the non-writeback versions VLDMDB and VSTMDB, which don't actually... | Owen Anderson | 2011-03-29 | 1 | -3/+0 |
| * | Fix ARM disassembly for PLD/PLDW/PLI which suffers from code rot and add some... | Johnny Chen | 2011-03-28 | 1 | -0/+9 |
| * | Add test for A8.6.246 UMULL to both arm-tests.txt amd thumb-tests.txt. | Johnny Chen | 2011-03-25 | 1 | -0/+3 |
| * | Instruction formats of SWP/SWPB were changed from LdStExFrm to MiscFrm. Modi... | Johnny Chen | 2011-03-25 | 1 | -0/+3 |
| * | ADR was added with the wrong encoding for inst{24-21}, and the ARM decoder wa... | Johnny Chen | 2011-03-24 | 1 | -0/+3 |
| * | Load/Store Multiple: | Johnny Chen | 2011-03-24 | 1 | -0/+6 |
| * | STRT and STRBT was incorrectly tagged as IndexModeNone during the refactoring... | Johnny Chen | 2011-03-24 | 1 | -0/+3 |
| * | The r128103 fix to cope with the removal of addressing modes from the MC inst... | Johnny Chen | 2011-03-24 | 1 | -0/+3 |
