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path: root/test/MC/Disassembler/Mips/mips32_le.txt
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* Update to LLVM 3.5a.Stephen Hines2014-04-241-0/+3
* [mips] Fix FP conditional move instructions to have explicit FP condition codeAkira Hatanaka2013-07-261-0/+18
* [mips] Fix FP branch instructions to have explicit FP condition code registerAkira Hatanaka2013-07-261-0/+6
* [mips] Print instructions "beq", "bne" and "or" using assembler pseudoAkira Hatanaka2013-07-261-0/+6
* [mips] Increase the number of floating point control registers available to 32.Akira Hatanaka2013-07-011-4/+4
* [Mips Disassembler] Have the DecodeCCRRegisterClass function use the getRegChad Rosier2013-06-261-4/+4
* Use object file specific section type for initial text sectionNico Rieck2013-04-141-1/+0
* This is a resubmittal. For some reason it broke the bots yesterdayJack Carter2013-01-171-0/+6
* reverting 172579Jack Carter2013-01-161-6/+0
* Akira,Jack Carter2013-01-161-0/+6
* Fix check strings in test/MC/Disassembler/Mips/* and run FileCheck.Akira Hatanaka2012-07-121-162/+138
* Reapply r158846.Akira Hatanaka2012-07-091-43/+49
* revert r159851.Akira Hatanaka2012-07-061-49/+43
* Reapply r158846.Akira Hatanaka2012-07-061-43/+49
* Revert r158846.Akira Hatanaka2012-06-201-49/+43
* In MipsDisassembler.cpp, instead of defining register class tables, use the onesAkira Hatanaka2012-06-201-43/+49
* Add disassembler to MIPS. Akira Hatanaka2012-04-171-0/+424
* Revert r153924. Delete test/MC/Disassembler/Mips and lib/Target/Mips/Disassem...Akira Hatanaka2012-04-031-0/+0
* Revert r153924. There were buildbot failures.Akira Hatanaka2012-04-031-424/+0
* MIPS disassembler support.Akira Hatanaka2012-04-031-0/+424