| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [XCore] Add LDAPB instructions. | Richard Osborne | 2013-05-05 | 1 | -0/+6 |
| * | [XCore] Add BLRB instructions. | Richard Osborne | 2013-05-05 | 1 | -0/+6 |
| * | Use object file specific section type for initial text section | Nico Rieck | 2013-04-14 | 1 | -1/+0 |
| * | [XCore] Add bru instruction. | Richard Osborne | 2013-04-04 | 1 | -0/+3 |
| * | [XCore] The RRegs register class is a superset of GRRegs. | Richard Osborne | 2013-04-04 | 1 | -0/+48 |
| * | [XCore] Check disassembly of the st8 instruction. | Richard Osborne | 2013-04-03 | 1 | -0/+3 |
| * | [XCore] Update disassembler test to improve coverage of the instructions. | Richard Osborne | 2013-04-03 | 1 | -6/+6 |
| * | [XCore] Add missing 2r instructions. | Richard Osborne | 2013-02-17 | 1 | -0/+9 |
| * | [XCore] Add TSETR instruction. | Richard Osborne | 2013-02-17 | 1 | -0/+3 |
| * | [XCore] Add missing u10 / lu10 instructions. | Richard Osborne | 2013-02-17 | 1 | -0/+12 |
| * | [XCore] Add missing u6 / lu6 instructions. | Richard Osborne | 2013-02-17 | 1 | -0/+36 |
| * | [XCore] Add missing l2rus instructions. | Richard Osborne | 2013-01-27 | 1 | -0/+6 |
| * | [XCore] Add missing l2r instructions. | Richard Osborne | 2013-01-27 | 1 | -0/+12 |
| * | [XCore] Add missing 1r instructions. | Richard Osborne | 2013-01-27 | 1 | -0/+27 |
| * | [XCore] Add missing 0r instructions. | Richard Osborne | 2013-01-27 | 1 | -0/+51 |
| * | Add instruction encodings / disassembly support for l4r instructions. | Richard Osborne | 2013-01-25 | 1 | -0/+11 |
| * | Add instruction encodings / disassembly support for l5r instructions. | Richard Osborne | 2013-01-25 | 1 | -0/+11 |
| * | Add instruction encodings / disassembly support for l6r instructions. | Richard Osborne | 2013-01-23 | 1 | -0/+5 |
| * | Add instruction encodings / disassembly support for u10 / lu10 instructions. | Richard Osborne | 2013-01-22 | 1 | -0/+14 |
| * | Add instruction encodings / disassembly support for u6 / lu6 instructions. | Richard Osborne | 2013-01-21 | 1 | -0/+50 |
| * | Add instruction encoding / disassembly support for ru6 / lru6 instructions. | Richard Osborne | 2013-01-21 | 1 | -0/+80 |
| * | Add instruction encodings / disassembly support for l2rus instructions. | Richard Osborne | 2013-01-20 | 1 | -0/+11 |
| * | Add instruction encodings / disassembly support for l3r instructions. | Richard Osborne | 2013-01-20 | 1 | -0/+44 |
| * | Add instruction encodings / disassembler support for 2rus instructions. | Richard Osborne | 2013-01-20 | 1 | -0/+23 |
| * | Add instruction encodings / disassembly support 3r instructions. | Richard Osborne | 2013-01-20 | 1 | -0/+38 |
| * | Add instruction encodings / disassembly support for l2r instructions. | Richard Osborne | 2012-12-17 | 1 | -0/+32 |
| * | Add instruction encodings for PEEK and ENDIN. | Richard Osborne | 2012-12-17 | 1 | -0/+6 |
| * | Add instruction encodings / disassembly support for rus instructions. | Richard Osborne | 2012-12-17 | 1 | -0/+20 |
| * | Add instruction encodings for ZEXT and SEXT. | Richard Osborne | 2012-12-17 | 1 | -0/+6 |
| * | Add instruction encodings / disassembly support for 2r instructions. | Richard Osborne | 2012-12-17 | 1 | -0/+74 |
| * | Add instruction encodings / disassembly support for 0r instructions. | Richard Osborne | 2012-12-17 | 1 | -0/+20 |
| * | Add tests for disassembly of 1r XCore instructions. | Richard Osborne | 2012-12-16 | 2 | -0/+45 |
