| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Add not so that these tests pass with pipefail enabled. | Rafael Espindola | 2013-07-23 | 3 | -3/+3 |
| * | Don't let x86 asm printer use the no operand movsd alias. It should use the n... | Craig Topper | 2013-07-23 | 1 | -1/+1 |
| * | Fix the move to/from accumulator register instructions that use a full 64-bit | Kevin Enderby | 2013-07-22 | 1 | -0/+30 |
| * | [SystemZ] Add tests for ALHSIK and ALGHSIK | Richard Sandiford | 2013-07-19 | 1 | -0/+30 |
| * | [SystemZ] Add ALRK, AGLRK, SLRK and SGLRK | Richard Sandiford | 2013-07-19 | 1 | -0/+24 |
| * | [ARMv8] Implement the NEON instructions VRINT{N, X, A, Z, M, P}. | Joey Gouly | 2013-07-19 | 2 | -0/+50 |
| * | [SystemZ] Add AHIK and AGHIK | Richard Sandiford | 2013-07-19 | 1 | -0/+30 |
| * | [SystemZ] Add ARK, AGRK, SRK and SGRK | Richard Sandiford | 2013-07-19 | 1 | -0/+24 |
| * | [SystemZ] Add NGRK, OGRK and XGRK | Richard Sandiford | 2013-07-19 | 1 | -0/+18 |
| * | [SystemZ] Add NRK, ORK and XRK | Richard Sandiford | 2013-07-19 | 1 | -0/+18 |
| * | [SystemZ] Start adding z196 and zEC12 support | Richard Sandiford | 2013-07-19 | 1 | -1/+109 |
| * | ARM: delete two tests now integrated into the larger files | Tim Northover | 2013-07-19 | 2 | -19/+0 |
| * | ARM: remove invalid invalid tests | Tim Northover | 2013-07-19 | 2 | -32/+0 |
| * | Improve llvm-mc disassembler mode and refactor ARM tests to use it | Tim Northover | 2013-07-19 | 63 | -611/+972 |
| * | [ARMv8] Add NEON instructions VCVT{A, N, P, M}. | Joey Gouly | 2013-07-18 | 2 | -0/+72 |
| * | Add Thumb tests for the ARMv8 FP instructions that I recently added. | Joey Gouly | 2013-07-18 | 1 | -0/+163 |
| * | Add the tests that I forgot to 'svn add' with my previous commit (r186504). | Joey Gouly | 2013-07-17 | 2 | -0/+20 |
| * | [SystemZ] Add MC support for R[NOX]SBG | Richard Sandiford | 2013-07-16 | 1 | -0/+63 |
| * | [SystemZ] Allow 8-bit operands to RISBG | Richard Sandiford | 2013-07-11 | 1 | -4/+4 |
| * | Add MC assembly/disassembly support for VRINT{A, N, P, M} to V8FP. | Joey Gouly | 2013-07-09 | 1 | -0/+24 |
| * | Add MC assembly/disassembly support for VRINT{Z, X, R} to V8FP. | Joey Gouly | 2013-07-09 | 1 | -0/+19 |
| * | Add MC assembly/disassembly support for VCVT{A, N, P, M} to V8FP. | Joey Gouly | 2013-07-09 | 1 | -0/+49 |
| * | Add MC support for the v8fp instructions: vmaxnm and vminnm. | Joey Gouly | 2013-07-06 | 1 | -0/+13 |
| * | Add support for MC assembling and disassembling of vsel{ge, gt, eq, vs} instr... | Joey Gouly | 2013-07-04 | 1 | -0/+25 |
| * | Add a V8FP instruction 'vcvt{b,t}' to convert between half and double precision. | Joey Gouly | 2013-07-04 | 2 | -0/+35 |
| * | This corrects the implementation of Thumb ADR instruction. There are three i... | Mihai Popa | 2013-07-03 | 1 | -1/+5 |
| * | [mips] Increase the number of floating point control registers available to 32. | Akira Hatanaka | 2013-07-01 | 4 | -16/+16 |
| * | [Mips Disassembler] Have the DecodeCCRRegisterClass function use the getReg | Chad Rosier | 2013-06-26 | 4 | -16/+16 |
| * | ARM: operands should be explicit when disassembled | Amaury de la Vieuville | 2013-06-26 | 1 | -0/+4 |
| * | ARM: check predicate bits for thumb instructions | Amaury de la Vieuville | 2013-06-24 | 2 | -0/+18 |
| * | ARM: rGPR is meant to be unpredictable, not undefined | Amaury de la Vieuville | 2013-06-24 | 2 | -3/+2 |
| * | ARM: fix thumb1 nop decoding | Amaury de la Vieuville | 2013-06-24 | 1 | -8/+2 |
| * | ARM: fix IT decoding | Amaury de la Vieuville | 2013-06-24 | 1 | -2/+6 |
| * | ARM: enable decoding of pc-relative PLD/PLI | Amaury de la Vieuville | 2013-06-24 | 2 | -0/+32 |
| * | Update the X86 disassembler to use xacquire and xrelease when appropriate. | Kevin Enderby | 2013-06-20 | 1 | -1/+29 |
| * | This reverts r155000. | Joey Gouly | 2013-06-20 | 2 | -4/+4 |
| * | ARM: add operands pre-writeback variants when needed | Amaury de la Vieuville | 2013-06-18 | 1 | -0/+16 |
| * | ARM: fix thumb literal loads decoding | Amaury de la Vieuville | 2013-06-18 | 1 | -2/+55 |
| * | ARM: thumb stores cannot use PC as dest register | Amaury de la Vieuville | 2013-06-18 | 1 | -0/+37 |
| * | ARM: fix thumb coprocessor instruction with pre-writeback disassembly | Amaury de la Vieuville | 2013-06-14 | 1 | -0/+3 |
| * | ARM: fix B decoding | Amaury de la Vieuville | 2013-06-13 | 1 | -0/+2 |
| * | This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These ar... | Mihai Popa | 2013-06-11 | 1 | -2/+10 |
| * | ARM: Enforce decoding rules for VLDn instructions | Amaury de la Vieuville | 2013-06-11 | 3 | -38/+62 |
| * | ARM: Fix STREX/LDREX reecoding | Amaury de la Vieuville | 2013-06-11 | 2 | -0/+28 |
| * | ARM: ISB cannot be passed the same options as DMB | Amaury de la Vieuville | 2013-06-10 | 2 | -0/+4 |
| * | ARM: fix VMOVvnf32 decoding when ambiguous with VCVT | Amaury de la Vieuville | 2013-06-08 | 1 | -0/+7 |
| * | ARM: enforce SRS decoding constraints | Amaury de la Vieuville | 2013-06-08 | 1 | -3/+7 |
| * | ARM: fix CPS decoding when ambiguous with QADD | Amaury de la Vieuville | 2013-06-08 | 2 | -0/+13 |
| * | ARM: fix VCVT decoding | Amaury de la Vieuville | 2013-06-08 | 1 | -0/+8 |
| * | This is a simple patch that changes RRX and RRXS to accept all registers as o... | Mihai Popa | 2013-06-05 | 1 | -0/+23 |
