| Commit message (Expand) | Author | Age | Files | Lines |
* | Teach the MBlaze disassembler to disassemble special purpose registers. | Wesley Peck | 2010-12-20 | 1 | -2/+78 |
* | Second attempt at converting Thumb2's LDRpci, including updating the gazillio... | Owen Anderson | 2010-12-07 | 1 | -1/+1 |
* | When using the 'push' mnemonic for Thumb2 stmdb, be explicit when it's the | Jim Grosbach | 2010-12-03 | 1 | -2/+2 |
* | Add correct encodings for STRD and LDRD, including fixup support. Additional... | Owen Anderson | 2010-12-01 | 1 | -1/+1 |
* | Now that the MBlaze backend is in its own directory, split the test cases int... | Wesley Peck | 2010-11-17 | 12 | -1079/+1089 |
* | Segregate tests by target. | Dale Johannesen | 2010-11-14 | 8 | -0/+12 |
* | Fixed error and re-enabled MBlaze MC disassembler tests. | Wesley Peck | 2010-11-13 | 1 | -0/+1079 |
* | This test stops after disassembling 1 instructions on | Dale Johannesen | 2010-11-13 | 1 | -1079/+0 |
* | Add test cases that should have been committed with 118969. | Wesley Peck | 2010-11-13 | 1 | -0/+1079 |
* | chase owen. | Chris Lattner | 2010-11-02 | 1 | -3/+3 |
* | tweak this to pass. | Chris Lattner | 2010-11-02 | 1 | -5/+4 |
* | temporarily xfail this. | Chris Lattner | 2010-11-02 | 1 | -2/+3 |
* | Fixed handling of immediate operand sizes, which | Sean Callanan | 2010-10-22 | 1 | -0/+3 |
* | ARM instructions that are both predicated and set the condition codes | Bob Wilson | 2010-10-15 | 1 | -3/+3 |
* | Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern | Jim Grosbach | 2010-10-13 | 1 | -0/+6 |
* | Added a testcase for the ENTER instruction. | Sean Callanan | 2010-10-05 | 1 | -1/+4 |
* | Fix vmov.f64 disassembly on targets where sizeof(long) != 8. | Benjamin Kramer | 2010-09-17 | 1 | -0/+3 |
* | add a test of an edge case value for the FP immediate (needs all digits of | Jim Grosbach | 2010-09-15 | 1 | -0/+3 |
* | Teach the MC disassembler to handle vmov.f32 and vmov.f64 immediate to register | Jim Grosbach | 2010-09-15 | 1 | -0/+2 |
* | Reapply r113875 with additional cleanups. | Jim Grosbach | 2010-09-14 | 1 | -1/+3 |
* | Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoid | Bob Wilson | 2010-08-17 | 2 | -0/+8 |
* | Add a Thumb2 t2RSBrr instruction for disassembly only. | Bob Wilson | 2010-08-13 | 1 | -0/+4 |
* | Move the Thumb2 SSAT and USAT optional shift operator out of the | Bob Wilson | 2010-08-13 | 1 | -0/+4 |
* | Cleaned up the for-disassembly-only entries in the arm instruction table so that | Johnny Chen | 2010-08-12 | 1 | -0/+6 |
* | The autogened decoder was confusing the ARM STRBT for ARM USAT, because the .td | Johnny Chen | 2010-08-12 | 1 | -0/+2 |
* | Changed the format of DMBsy, DSBsy, and friends from Pseudo to MiscFrm. | Johnny Chen | 2010-08-11 | 1 | -0/+6 |
* | Move the ARM SSAT and USAT optional shift amount operand out of the | Bob Wilson | 2010-08-11 | 1 | -0/+4 |
* | Add an ARM RSCrr instruction for disassembly only. | Bob Wilson | 2010-08-05 | 1 | -0/+4 |
* | Add an ARM RSBrr instruction for disassembly only. | Bob Wilson | 2010-08-05 | 1 | -0/+4 |
* | ARM "rrx" shift operands do not have an immediate. PR7790. | Bob Wilson | 2010-08-05 | 1 | -0/+4 |
* | Add support for disassembling VMVN (immediate) instructions. PR7747. | Bob Wilson | 2010-07-31 | 1 | -0/+3 |
* | my work on adding segment registers to LEA missed the | Chris Lattner | 2010-07-13 | 1 | -0/+3 |
* | Eliminated the classification of control registers into %ecr_ | Sean Callanan | 2010-05-06 | 1 | -0/+3 |
* | Thumb instructions which have reglist operands at the end and predicate operands | Johnny Chen | 2010-04-21 | 1 | -2/+5 |
* | When doing Thumb disassembly, there's no need to consider t2ADDrSPi12/t2SUBrS... | Johnny Chen | 2010-04-20 | 1 | -0/+3 |
* | For t2LDRT, t2LDRBT, t2LDRHT, t2LDRSBT, and t2LDRSHT, if Rn(Inst{19-16})=='11... | Johnny Chen | 2010-04-20 | 1 | -0/+3 |
* | According to A8.6.16 B (Encoding T3) and A8.3 Conditional execution -- A8.3.1 | Johnny Chen | 2010-04-19 | 1 | -0/+3 |
* | ARM disassembler did not react to recent changes to the NEON instruction table. | Johnny Chen | 2010-04-19 | 1 | -0/+4 |
* | testcase for r101538, patch by Nico Schmidt! | Chris Lattner | 2010-04-17 | 1 | -0/+3 |
* | Minor change to make the test case comply with Vd<0> == '0' when Q == '1'. | Johnny Chen | 2010-04-16 | 1 | -1/+1 |
* | Fixed a bug in DisassembleN1RegModImmFrm() where a break stmt was missing for a | Johnny Chen | 2010-04-16 | 1 | -0/+3 |
* | In the same spirit of r101524, which removed the assert() from printAddrMode2... | Johnny Chen | 2010-04-16 | 1 | -0/+3 |
* | Multiclass LdStCop was using pre-UAL syntax LDC<c>L for the L fragment. Changed | Johnny Chen | 2010-04-16 | 1 | -0/+3 |
* | Added another test case for am3offset operand, testing Rn, #+/-imm8. | Johnny Chen | 2010-04-15 | 1 | -0/+3 |
* | Fixed a bug in ARM disassembly where LDRSBT should have am3offset operand, not | Johnny Chen | 2010-04-15 | 1 | -0/+3 |
* | tests: MC/Disassembler tests depend on ARM support being compiler in. | Daniel Dunbar | 2010-04-15 | 1 | -1/+3 |
* | Fixed a crasher in arm disassembler within ARMInstPrinter.cpp after calling | Johnny Chen | 2010-04-12 | 1 | -0/+3 |
* | unXFAIL, arm disassembler was reenabled. | Benjamin Kramer | 2010-04-07 | 3 | -3/+0 |
* | Reverting 100265 to try to get buildbots green again. Lots of self-hosting bu... | Evan Cheng | 2010-04-05 | 3 | -0/+3 |
* | Second try of initial ARM/Thumb disassembler check-in. It consists of a tablgen | Johnny Chen | 2010-04-02 | 3 | -0/+184 |