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* Add test cases for the various instruction alias and Intel syntax fixes that ...Craig Topper2013-07-261-0/+222
* X86: Make the cmov aliases work with intel syntax too.Benjamin Kramer2013-06-131-0/+29
* [x86AsmParser] It's valid to stop parsing an operand at an immediate.Chad Rosier2013-05-091-0/+2
* Add test case for PR15779, which has previously been fixed.Chad Rosier2013-04-221-1/+2
* [ms-inline asm] Apply the condition code mnemonic aliases to both the Intel andChad Rosier2013-04-181-0/+30
* [ms-inline asm] Add support for the minus unary operator. Previously, we wereChad Rosier2013-04-171-1/+8
* [ms-inline asm] Add support for numeric displacement expressions in bracketedChad Rosier2013-04-051-1/+38
* [ms-inline asm] Extend support for parsing Intel bracketed memory operands thatChad Rosier2013-01-141-9/+191
* Make x86 asm parser to check for xmm vs ymm for index register in gather inst...Craig Topper2012-07-181-0/+2
* Intel Syntax: Parse mem operand with seg reg. QWORD PTR FS:[320]Devang Patel2012-01-271-0/+2
* Intel syntax: Robustify parsing of memory operand's displacement experssion.Devang Patel2012-01-231-2/+4
* Intel syntax: Parse memory operand with empty base reg, e.g. DWORD PTR [4*RDI]Devang Patel2012-01-231-1/+3
* Intel syntax: Parse segment registers.Devang Patel2012-01-231-0/+2
* Intel syntax: Robustify register parsing.Devang Patel2012-01-201-0/+2
* Process instructions after match to select alternative encoding which may be ...Devang Patel2012-01-181-0/+24
* Intel syntax: Fix parser match class to check memory operand size.Devang Patel2012-01-171-0/+2
* Intel syntax: Parse "BYTE PTR [RDX + RCX]"Devang Patel2012-01-171-0/+2
* Intel syntax: Do not unncessarily create plus expression for memory operand d...Devang Patel2012-01-171-0/+2
* Intel syntax: Ignore mnemonic aliases.Devang Patel2012-01-171-0/+8
* Intel syntax: Robustify memory operand parsing.Devang Patel2012-01-171-0/+8
* Add new test.Devang Patel2012-01-131-0/+10