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* X86: add more GATHER intrinsics in LLVMManman Ren2012-06-291-2/+26
* X86: add GATHER intrinsics (AVX2) in LLVMManman Ren2012-06-261-0/+8
* Remove some duplicate instructions that exist only to given different mnemoni...Craig Topper2012-06-262-12/+12
* Add intrinsics, code gen, assembler and disassembler support for the SSE4a ex...Benjamin Kramer2012-05-291-0/+25
* Add retw and lretw instructions. Also, fix Intel syntax parsing for allCharles Davis2012-04-113-0/+25
* Add support for AVX enhanced comparison predicates. Patch from Kay Tiong Khoo.Craig Topper2012-04-031-0/+768
* Fix generation of the address size override prefix. Add assertions forJoerg Sonnenberger2012-03-211-0/+13
* Change the X86 assembler to not require a segment register on stringKevin Enderby2012-03-131-0/+3
* Added a missing error check for X86 assembly with mismatched base and indexKevin Enderby2012-03-121-0/+4
* Add the missing call to Error when a bad X86 scale expression is parsed.Kevin Enderby2012-03-091-0/+4
* test/MC/X86/lit.local.cfg: Fix up to detect 'X86' in targets.NAKAMURA Takumi2012-03-091-0/+11
* Fix the operand ordering on aliases for shld and shrd. PR12173, part 2.Eli Friedman2012-03-061-13/+21
* Make aliases for shld and shrd match gas. PR12173.Eli Friedman2012-03-051-6/+11
* Updated the llvm-mc disassembler C API to support for the X86 target.Kevin Enderby2012-02-231-3/+3
* Add vmfunc instruction to X86 assembler and disassembler.Craig Topper2012-02-192-0/+6
* Add X86 assembler and disassembler support for AMD SVM instructions. Original...Craig Topper2012-02-182-1/+50
* Replace all instances of dg.exp file with lit.local.cfg, since all tests are ...Eli Bendersky2012-02-162-5/+1
* Intel syntax. Adjust special code, used to recognize cmp<comparison code>{ss,...Devang Patel2012-01-301-0/+3
* Intel syntax. Support .intel_syntax directive.Devang Patel2012-01-301-0/+7
* Intel Syntax: Parse mem operand with seg reg. QWORD PTR FS:[320]Devang Patel2012-01-271-0/+2
* Intel Syntax: Extend special hand coded logic, to recognize special instructi...Devang Patel2012-01-241-0/+3
* Intel syntax: Robustify parsing of memory operand's displacement experssion.Devang Patel2012-01-231-2/+4
* Intel syntax: Parse memory operand with empty base reg, e.g. DWORD PTR [4*RDI]Devang Patel2012-01-231-1/+3
* Intel syntax: Parse segment registers.Devang Patel2012-01-231-0/+2
* Intel syntax: Robustify register parsing.Devang Patel2012-01-201-0/+2
* Intel syntax: Parse ... PTR [-8]Devang Patel2012-01-201-1/+2
* Intel syntax: For now, disable ambiguous JMP64pcrel32 for intel syntax.Devang Patel2012-01-201-1/+4
* Post process 'and', 'sub' instructions and select better encoding, if available.Devang Patel2012-01-191-0/+8
* Intel syntax: There is no need to create unary expr for simple negative displ...Devang Patel2012-01-191-0/+4
* Post process 'xor', 'or' and 'cmp' instructions and select better encoding, i...Devang Patel2012-01-191-0/+22
* Process instructions after match to select alternative encoding which may be ...Devang Patel2012-01-181-0/+24
* Intel syntax: Fix parser match class to check memory operand size.Devang Patel2012-01-171-0/+2
* Intel syntax: Parse "BYTE PTR [RDX + RCX]"Devang Patel2012-01-171-0/+2
* Intel syntax: Do not unncessarily create plus expression for memory operand d...Devang Patel2012-01-171-0/+2
* Intel syntax: Ignore mnemonic aliases.Devang Patel2012-01-171-0/+8
* Intel syntax: Robustify memory operand parsing.Devang Patel2012-01-171-0/+8
* Add new test.Devang Patel2012-01-131-0/+10
* Remove test case, as Chris suggested.Devang Patel2012-01-121-23/+0
* Add test case to check intel syntax parsing.Devang Patel2012-01-121-0/+23
* Make sure we correctly note the existence of an i8 immediate for vblendvps an...Eli Friedman2011-12-151-0/+7
* XOP instructions and encoding tests.Jan Sjödin2011-12-121-0/+584
* Support for encoding all FMA4 instructions and tablegen patterns for allJan Sjödin2011-11-301-0/+378
* This patch contains support for encoding FMA4 instructions andBruno Cardoso Lopes2011-11-251-0/+13
* X86: alias cqo to cqto.Benjamin Kramer2011-11-241-0/+1
* Move test to the X86 directory, note the PR number and only run MC once.Rafael Espindola2011-10-311-0/+3
* Change the sysexit mnemonic (and sysexitl) to never have the REX.W prefix andKevin Enderby2011-10-273-0/+21
* Add X86 SARX, SHRX, and SHLX instructions.Craig Topper2011-10-231-0/+49
* Add X86 RORX instructionCraig Topper2011-10-231-0/+32
* Rename PEXTR to PEXT. Add intrinsics for BMI instructions.Craig Topper2011-10-191-8/+8
* Add X86 PEXTR and PDEP instructions.Craig Topper2011-10-161-0/+32