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* AsmParser: Add support for the .purgem directive.Benjamin Kramer2012-05-121-0/+12
* AsmParser: ignore the .extern directive.Benjamin Kramer2012-05-121-0/+4
* AsmParser: Add support for .ifc and .ifnc directives.Benjamin Kramer2012-05-121-0/+65
* AsmParser: Add support for .ifb and .ifnb directives.Benjamin Kramer2012-05-121-0/+67
* Make the following changes in MipsAsmPrinter.cpp:Akira Hatanaka2012-05-121-1/+3
* Insert instructions to the entry basic block which initializes the globalAkira Hatanaka2012-05-121-1/+3
* Added the missing bit definition for the 4th bit of the STR (post reg) instru...Silviu Baranga2012-05-112-0/+67
* Fixed the LLVM ARM v7 assembler and instruction printer for 8-bit immediate o...Silviu Baranga2012-05-111-0/+3
* Fix issues with the ARM bl and blx thumb instructions and the J1 and J2 bitsKevin Enderby2012-05-033-2/+29
* Fixed disassembler for vstm/vldm ARM VFP instructions.Silviu Baranga2012-05-031-0/+27
* ARM: Add missing two-operand VBIC aliases.Jim Grosbach2012-05-021-0/+5
* Disallow YIELD and other allocated nop hints in pre-ARMv6 architectures.Richard Barton2012-05-024-29/+18
* ARM: Add a few missing add->sub aliases w/ 'w' suffix.Jim Grosbach2012-05-011-0/+12
* ARM: allow vanilla expressions for movw/movt.Jim Grosbach2012-05-011-0/+5
* MC: Unknown assembler directives are now hard errors.Jim Grosbach2012-05-012-3/+3
* ARM: Thumb add(sp plus register) asm constraints.Jim Grosbach2012-04-272-0/+7
* Fix ARM assembly parsing for upper case condition codes on IT instructions.Richard Barton2012-04-271-0/+13
* Missed some register numbers.Benjamin Kramer2012-04-271-3/+3
* Update edis test for r155704.Benjamin Kramer2012-04-271-1/+1
* Specify cpu to unbreak tests.Evan Cheng2012-04-2616-17/+17
* ARM: improved assembler diagnostics for missing CPU features.Jim Grosbach2012-04-241-9/+9
* Add missing test cases for ARM VLD3 (single 3-element structure to all lanes)Kevin Enderby2012-04-242-0/+38
* Add missing test cases for ARM VLD4 (single 4-element structure to all lanes)Kevin Enderby2012-04-242-0/+49
* ARM: Add testcases for two-operand variants of VSRA/VRSRA/VSRI.Jim Grosbach2012-04-232-0/+209
* Add ARM mode tests for the NEON vector shift-accumulate tests.Jim Grosbach2012-04-231-0/+105
* Tidy up. Reformat for ease of reading.Jim Grosbach2012-04-231-95/+102
* ARM: Update NEON assembly two-operand aliases.Jim Grosbach2012-04-202-0/+21
* ARM some VFP tblgen'erated two-operand aliases.Jim Grosbach2012-04-201-2/+7
* Tidy up. Formatting.Jim Grosbach2012-04-201-53/+45
* Added support for disassembling unpredictable swp/swpb ARM instructions.Silviu Baranga2012-04-181-0/+26
* Fix the bahavior of the disassembler when decoding unpredictable mrs instruct...Silviu Baranga2012-04-181-0/+18
* Added support for unpredictable mcrr/mcrr2/mrrc/mrrc2 ARM instruction in the ...Silviu Baranga2012-04-182-0/+17
* Fixed decoding for the ARM cdp2 instruction. The restriction on the coprocess...Silviu Baranga2012-04-181-0/+3
* Add suport for unpredicatble cases of the cmp, tst, teq and cmnz ARM instruct...Silviu Baranga2012-04-181-0/+30
* Add disassembler to MIPS. Akira Hatanaka2012-04-178-0/+2042
* Fix ARM disassembly of VLD2 (single 2-element structure to all lanes)Kevin Enderby2012-04-172-0/+75
* ARM two-operand forms for vhadd and vhsub instructions.Jim Grosbach2012-04-162-0/+53
* MC assembly parser handling for trailing comma in macro instantiation.Jim Grosbach2012-04-161-0/+24
* This patch fixes 3 problems:Akira Hatanaka2012-04-161-10/+10
* ARM assembly two-operand forms for VRSHL.Jim Grosbach2012-04-161-0/+35
* Tidy up. Test formatting.Jim Grosbach2012-04-161-53/+64
* Do not add offset in applyFixup. This has already been accounted for in Value. Akira Hatanaka2012-04-161-0/+22
* ARM two-operand aliases for VRHADD instructions.Jim Grosbach2012-04-161-0/+27
* Tidy up. Testcase formatting.Jim Grosbach2012-04-161-13/+14
* Add -disassemble support for -show-inst and -show-encode capability llvm-mc. ...Richard Barton2012-04-161-1/+1
* Fixed a case of ARM disassembly getting an assert on a bad encodingKevin Enderby2012-04-111-0/+13
* ARM 'vuzp.32 Dd, Dm' is a pseudo-instruction.Jim Grosbach2012-04-111-0/+2
* ARM 'vzip.32 Dd, Dm' is a pseudo-instruction.Jim Grosbach2012-04-111-0/+2
* Clean up ARM fused multiply + add/sub support some more: rename some iselEvan Cheng2012-04-111-1/+1
* Add retw and lretw instructions. Also, fix Intel syntax parsing for allCharles Davis2012-04-114-0/+31
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