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* Swift: Only build vldm/vstm with q register aligned register listsArnold Schwaighofer2013-09-041-0/+28
| | | | | | | | Unaligned vldm/vstm need more uops and therefore are slower in general on swift. radar://14522102 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189961 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix scheduling for vldm/vstm instructions that load/store more than 32 bytes ↵Silviu Baranga2013-09-041-0/+71
| | | | | | on Cortex-A9. This also makes the existing code more compact. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189958 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Add r159136 back now that pr13124 has been fixed."Rafael Espindola2013-09-041-14/+0
| | | | | | | | | | | | | | | | | | | This reverts commit r189886. I found a corner case where this optimization is not valid: Say we have a "linkonce_odr unnamed_addr" in two translation units: * In TU 1 this optimization kicks in and makes it hidden. * In TU 2 it gets const merged with a constant that is *not* unnamed_addr, resulting in a non unnamed_addr constant with default visibility. * The static linker rules for combining visibility them produce a hidden symbol, which is incorrect from the point of view of the non unnamed_addr constant. The one place we can do this is when we know that the symbol is not used from another TU in the same shared object, i.e., during LTO. I will move it there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189954 91177308-0d34-0410-b5e6-96231b3b80d8
* Error on linking appending globals with different unnamed_addr.Rafael Espindola2013-09-042-0/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189950 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Fix an assertion failure while lowering fcmp on long double.Venkatraman Govindaraju2013-09-041-0/+20
| | | | | | | | This assertion is triggered because an integer constant is created with wrong type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189948 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix linking of unnamed_addr in functions.Rafael Espindola2013-09-042-0/+27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189945 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename in preparation for adding tests for function linking.Rafael Espindola2013-09-042-28/+28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189944 91177308-0d34-0410-b5e6-96231b3b80d8
* Use CHECK-DAG instead of sort.Rafael Espindola2013-09-041-11/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189942 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix linking of unnamed_addr.Rafael Espindola2013-09-041-3/+3
| | | | | | | | This was regression from r134829. When linking we have to be conservative. If one of the symbols has a significant address, then the result should have it too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189935 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: allow unmasked icmps to be combined with logical opsTim Northover2013-09-041-0/+30
| | | | | | | | | | "(icmp op i8 A, B)" is equivalent to "(icmp op i8 (A & 0xff), B)" as a degenerate case. Allowing this as a "masked" comparison when analysing "(icmp) &/| (icmp)" allows us to combine them in more cases. rdar://problem/7625728 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189931 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: look for masked compares with subset relationTim Northover2013-09-041-0/+122
| | | | | | | | | | | Even in cases which aren't universally optimisable like "(A & B) != 0 && (A & C) != 0", the masks can make one of the comparisons completely redundant. In this case, since we've gone to the effort of spotting masked comparisons we should combine them. rdar://problem/7625728 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189930 91177308-0d34-0410-b5e6-96231b3b80d8
* Inplement aarch64 neon instructions in AdvSIMD(shift). About 24 shift ↵Hao Liu2013-09-044-3/+3076
| | | | | | | | | | | instructions: sshr,ushr,ssra,usra,srshr,urshr,srsra,ursra,sri,shl,sli,sqshlu,sqshl,uqshl,shrn,sqrshrun,sqshrn,uqshr,sqrshrn,uqrshrn,sshll,ushll and 4 convert instructions: scvtf,ucvtf,fcvtzs,fcvtzu git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189925 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Revert "Remove the darwin gdb option, that version of gdb is now ↵Michael Gottesman2013-09-042-4/+1
| | | | | | | | | | | | | | dead and the rest of the compatibility should be done on a dwarf-N level."" This reverts commit r189913. Talked with Eric on IRC. I am going to XFAIL the failing test since it is using what Eric described as "the member hack" which was needed on that old GDB. Sorry for the noise! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189914 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Remove the darwin gdb option, that version of gdb is now dead and ↵Michael Gottesman2013-09-042-1/+4
| | | | | | | | | | | | the rest of the compatibility should be done on a dwarf-N level." This reverts commit r189903. This commit broke the phase 1 buildbot for a while. http://lab.llvm.org:8013/builders/clang-x86_64-darwin11-nobootstrap-RAincremental/builds/6684 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189913 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the darwin gdb option, that version of gdb is now dead andEric Christopher2013-09-042-4/+1
| | | | | | the rest of the compatibility should be done on a dwarf-N level. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189903 91177308-0d34-0410-b5e6-96231b3b80d8
* Add r159136 back now that pr13124 has been fixed.Rafael Espindola2013-09-031-0/+14
| | | | | | | | | | Original message: If a constant or a function has linkonce_odr linkage and unnamed_addr, mark hidden. Being linkonce_odr guarantees that it is available in every dso that needs it. Being a constant/function with unnamed_addr guarantees that the copies don't have to be merged. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189886 91177308-0d34-0410-b5e6-96231b3b80d8
* [objc-arc] Turn off the objc_retainBlock -> objc_retain optimization.Michael Gottesman2013-09-035-672/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The reason that I am turning off this optimization is that there is an additional case where a block can escape that has come up. Specifically, this occurs when a block is used in a scope outside of its current scope. This can cause a captured retainable object pointer whose life is preserved by the objc_retainBlock to be deallocated before the block is invoked. An example of the code needed to trigger the bug is: ---- \#import <Foundation/Foundation.h> int main(int argc, const char * argv[]) { void (^somethingToDoLater)(); { NSObject *obj = [NSObject new]; somethingToDoLater = ^{ [obj self]; // Crashes here }; } NSLog(@"test."); somethingToDoLater(); return 0; } ---- In the next commit, I remove all the dead code that results from this. Once I put in the fixing commit I will bring back the tests that I deleted in this commit. rdar://14802782. rdar://14868830. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189869 91177308-0d34-0410-b5e6-96231b3b80d8
* [objc-arc] Move some block tests from basic.ll -> retain-block.ll and add ↵Michael Gottesman2013-09-033-55/+55
| | | | | | some missing CHECK-LABELS. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189868 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach InstCombineLoadCast about address spaces.Matt Arsenault2013-09-031-1/+22
| | | | | | | | This is another one that doesn't matter much, but uses the right GEP index types in the first place. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189854 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Revert "ARM: Improve pattern for isel mul of vector by scalar.""Jim Grosbach2013-09-031-0/+18
| | | | | | | | | This reverts commit r189648. Fixes for the previously failing clang-side arm_neon_intrinsics test cases will be checked in separately. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189841 91177308-0d34-0410-b5e6-96231b3b80d8
* Add the rest of the stock attributes to the attribute table.Eric Christopher2013-09-031-2/+2
| | | | | | | | This won't affect the kinds of hashes we test for as we actually do hashing based on form and attribute. Change the fission-hash testcase one last time to handle DW_AT_comp_dir. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189840 91177308-0d34-0410-b5e6-96231b3b80d8
* In this patch we are trying to do two things:Yi Jiang2013-09-033-13/+141
| | | | | | | | | 1) If the width of vectorization list candidate is bigger than vector reg width, we will break it down to fit the vector reg. 2) We do not vectorize the width which is not power of two. The performance result shows it will help some spec benchmarks. mesa improved 6.97% and ammp improved 1.54%. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189830 91177308-0d34-0410-b5e6-96231b3b80d8
* Print string value for DT_RPATH and DT_RUNPATH.Joerg Sonnenberger2013-09-032-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189829 91177308-0d34-0410-b5e6-96231b3b80d8
* [SystemZ] Add support for TMHH, TMHL, TMLH and TMLLRichard Sandiford2013-09-031-0/+352
| | | | | | | | | | For now this just handles simple comparisons of an ANDed value with zero. The CC value provides enough information to do any comparison for a 2-bit mask, and some nonzero comparisons with more populated masks, but that's all future work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189819 91177308-0d34-0410-b5e6-96231b3b80d8
* [msan] Fix handling of select with struct arguments.Evgeniy Stepanov2013-09-031-0/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189796 91177308-0d34-0410-b5e6-96231b3b80d8
* [msan] Fix select instrumentation.Evgeniy Stepanov2013-09-031-0/+9
| | | | | | | | Select condition shadow was being ignored resulting in false negatives. This change OR-s sign-extended condition shadow into the result shadow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189785 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Add support for soft long double (fp128).Venkatraman Govindaraju2013-09-031-19/+55
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189780 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Implement spill and load for long double(f128) registers.Venkatraman Govindaraju2013-09-021-0/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189768 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Default to the Swift CPU when targeting armv7s/thumbv7s.Tilmann Scheller2013-09-021-1/+1
| | | | | | | | | | Test cases adjusted accordingly. This fixes rdar://14871821. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189766 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 189756 for now, it doesn't match what rdar://14871821 really wants.Tilmann Scheller2013-09-022-3/+3
| | | | | | | What we really want is to enable Swift by default for *v7s triples (and there already seems to be some logic which attempts to do that). In that case the iOS version doesn't matter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189763 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Default to Swift when compiling for iOS 6 or later.Tilmann Scheller2013-09-022-3/+3
| | | | | | | | | | Test cases adjusted accordingly. This fixes rdar://14871821. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189756 91177308-0d34-0410-b5e6-96231b3b80d8
* FileCheck-ize three tests of llvm/test/CodeGen/X86/h-register(s).NAKAMURA Takumi2013-09-023-5/+56
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189755 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/test/CodeGen/X86: Update tests with -mattr=-bmi not to take BMI, ↵NAKAMURA Takumi2013-09-025-7/+7
| | | | | | | | corresponding to Craig's r189742. AMD Piledriver builder detected failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189754 91177308-0d34-0410-b5e6-96231b3b80d8
* Create BEXTR instructions for (and ((sra or srl) x, imm), (2**size - 1)). ↵Craig Topper2013-09-021-0/+25
| | | | | | Fixes PR17028. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189742 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX-512: gather-scatter tests; added foldable instructions;Elena Demikhovsky2013-09-021-14/+16
| | | | | | | Specify GATHER/SCATTER as heavy instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189736 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm interpreter: select, shuffle and insertelement instructions.Elena Demikhovsky2013-09-023-0/+240
| | | | | | | | | | | This patch implements vector support for select instruction and adds specific vector instructions : shuffle and insertelement. (tests are also included) and functions lle_X_memset, lle_X_memcpy added. Done by Veselov, Yuri (mailto:Yuri.Veselov@intel.com) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189735 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX-512: Added GATHER and SCATTER instructions.Elena Demikhovsky2013-09-011-0/+223
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189729 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure we don't generate stubs for any of these functions because theyReed Kotler2013-09-011-15/+13
| | | | | | | | | | | don't exist in libc. This is really not the right way to solve this problem; but it's not clear to me at this time exactly what is the right way. If we create stubs here, they will cause link errors because these functions do not exist in libc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189727 91177308-0d34-0410-b5e6-96231b3b80d8
* SimplifyLibCalls: When emitting an overloaded fp function check that it's ↵Benjamin Kramer2013-08-311-0/+20
| | | | | | | | | | available. The existing code missed some edge cases when e.g. we're going to emit sqrtf but only the availability of sqrt was checked. This happens on odd platforms like windows. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189724 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Call support for fast-isel.Bill Schmidt2013-08-302-0/+166
| | | | | | | | | | This patch adds fast-isel support for calls (but not intrinsic calls or varargs calls). It also removes a badly-formed assert. There are some new tests just for calls, and also for folding loads into arguments on calls to avoid extra extends. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189701 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed a bug where diassembling an instruction that had a prefix would cause ↵Richard Mitton2013-08-301-0/+59
| | | | | | LLVM to identify a 1-byte instruction, but then upon querying it for that 1-byte instruction would cause an undefined opcode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189698 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a problem with dual mips16/mips32 mode. When the underlying processorReed Kotler2013-08-301-0/+38
| | | | | | | | | | | | | | | has hard float, when you compile the mips32 code you have to make sure that it knows to compile any mips32 routines as hard float. I need to clean up the way mips16 hard float is specified but I need to first think through all the details. Mips16 always has a form of soft float, the difference being whether the underlying hardware has floating point. So it's not really necessary to pass the -soft-float to llvm since soft-float is always true for mips16 by virtue of the fact that it will not register floating point registers. By using this fact, I can simplify the way this is all handled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189690 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Add handling for conversions to fast-isel.Bill Schmidt2013-08-301-0/+305
| | | | | | | | | | Yet another chunk of fast-isel code. This one handles various conversions involving floating-point. (It also includes some miscellaneous handling throughout the back end for LWA_32 and LWAX_32 that should have been part of the load-store patch.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189677 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: Check for zero shift amounts before subtracting one causing ↵Benjamin Kramer2013-08-301-0/+36
| | | | | | | | | integer overflow. PR17026. Also avoid undefined shifts and shift amounts larger than 64 bits (those are always undef because we can't represent integer types that large). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189672 91177308-0d34-0410-b5e6-96231b3b80d8
* Restore llvm-ranlib expansion in RUN-lines removed in r184019Alexey Samsonov2013-08-301-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189665 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach X86 backend to create BMI2 BZHI instructions from (and X, (add (shl 1, ↵Craig Topper2013-08-301-0/+45
| | | | | | Y), -1)). Fixes PR17038. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189653 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "ARM: Improve pattern for isel mul of vector by scalar."Michael Gottesman2013-08-301-18/+0
| | | | | | | | This reverts commit r189619. The commit was breaking the arm_neon_intrinsic test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189648 91177308-0d34-0410-b5e6-96231b3b80d8
* mi-sched: improve the generic register pressure comparison.Andrew Trick2013-08-303-17/+15
| | | | | | | Only compare pressure within the same set. When multiple sets are affected, we prioritize the most constrained set. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189641 91177308-0d34-0410-b5e6-96231b3b80d8
* mi-sched: Precompute a PressureDiff for each instruction, adjust for ↵Andrew Trick2013-08-303-4/+6
| | | | | | | | | | | | | liveness later. Created SUPressureDiffs array to hold the per node PDiff computed during DAG building. Added a getUpwardPressureDelta API that will soon replace the old one. Compute PressureDelta here from the precomputed PressureDiffs. Updating for liveness will come next. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189640 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Handle selection of compare instructions in fast-isel.Bill Schmidt2013-08-301-0/+289
| | | | | | | | Mostly trivial patch adding support for compares. The meat of the work was added with the branch support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189639 91177308-0d34-0410-b5e6-96231b3b80d8
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