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* Fix macros arguments with an underscore, dot or dollar in them. This is basedRafael Espindola2012-08-211-0/+21
| | | | | | on a patch by Andy/PaX. I added the support for dot and dollar. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162298 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the wording in of the "expected identifier" error in the .macro directiveRafael Espindola2012-08-211-0/+9
| | | | | | | consistent with the other "expected identifier" errors. Extracted from the Andy/PaX patch. I added the test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162291 91177308-0d34-0410-b5e6-96231b3b80d8
* Add correct set of regression tests for r162094 commit.Tim Northover2012-08-211-33/+33
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162276 91177308-0d34-0410-b5e6-96231b3b80d8
* Port the global copy optimization from the SROA pass to InstCombine.Chandler Carruth2012-08-211-20/+10
| | | | | | | | | | This optimization is really just replacing allocas wholesale with globals, there is no scalarization. The underlying motivation for this patch is to simplify the SROA pass and focus it on splitting and promoting allocas. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162271 91177308-0d34-0410-b5e6-96231b3b80d8
* [asan] add code to detect global initialization fiasco in C/C++. The ↵Kostya Serebryany2012-08-211-0/+36
| | | | | | sub-pass is off by default for now. Patch by Reid Watson. Note: this patch changes the interface between LLVM and compiler-rt parts of asan. The corresponding patch to compiler-rt will follow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162268 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a missing def flag.Jakob Stoklund Olesen2012-08-211-1/+1
| | | | | | | | | | *** Bad machine code: Explicit definition marked as use *** - function: test_cos - basic block: BB#0 L.entry (0x7ff2a2024fd0) - instruction: VSETLNi32 %D11, %D11<undef>, %R0, 0, pred:14, pred:%noreg, %Q5<imp-use,kill>, %Q5<imp-def> - operand 0: %D11 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162247 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't add CFG edges for redundant conditional branches.Jakob Stoklund Olesen2012-08-201-1/+1
| | | | | | | | | | | | | IR that hasn't been through SimplifyCFG can look like this: br i1 %b, label %r, label %r Make sure we don't create duplicate Machine CFG edges in this case. Fix the machine code verifier to accept conditional branches with a single CFG edge. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162230 91177308-0d34-0410-b5e6-96231b3b80d8
* fix a case where all operands of BUILD_VECTOR are undefinedMichael Liao2012-08-201-0/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162214 91177308-0d34-0410-b5e6-96231b3b80d8
* Forget to add testcase for r162195. Sorry.Stepan Dyatkovskiy2012-08-201-0/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162196 91177308-0d34-0410-b5e6-96231b3b80d8
* When unsafe math is used, we can use commutative FMAX and FMIN. In some casesNadav Rotem2012-08-191-48/+32
| | | | | | | | | | | | | | | | | | | | | | this allows for better code generation. Added a new DAGCombine transformation to convert FMAX and FMIN to FMANC and FMINC, which are commutative. For example: movaps %xmm0, %xmm1 movsd LC(%rip), %xmm0 minsd %xmm1, %xmm0 becomes: minsd LC(%rip), %xmm0 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162187 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: Fix a crasher when encountering a function pointer.Benjamin Kramer2012-08-181-0/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162180 91177308-0d34-0410-b5e6-96231b3b80d8
* Also combine zext/sext into selects for ARM.Jakob Stoklund Olesen2012-08-181-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This turns common i1 patterns into predicated instructions: (add (zext cc), x) -> (select cc (add x, 1), x) (add (sext cc), x) -> (select cc (add x, -1), x) For a function like: unsigned f(unsigned s, int x) { return s + (x>0); } We now produce: cmp r1, #0 it gt addgt.w r0, r0, #1 Instead of: movs r2, #0 cmp r1, #0 it gt movgt r2, #1 add r0, r2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162177 91177308-0d34-0410-b5e6-96231b3b80d8
* Also pass logical ops to combineSelectAndUse.Jakob Stoklund Olesen2012-08-181-8/+8
| | | | | | | | | | | | | | | | Add these transformations to the existing add/sub ones: (and (select cc, -1, c), x) -> (select cc, x, (and, x, c)) (or (select cc, 0, c), x) -> (select cc, x, (or, x, c)) (xor (select cc, 0, c), x) -> (select cc, x, (xor, x, c)) The selects can then be transformed to a single predicated instruction by peephole. This transformation will make it possible to eliminate the ISD::CAND, COR, and CXOR custom DAG nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162176 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: Add a couple of fabs identities for comparing with 0.0.Benjamin Kramer2012-08-181-0/+82
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162174 91177308-0d34-0410-b5e6-96231b3b80d8
* SimplifyLibcalls: Add fabs and trunc to the list of libcalls that are safe ↵Benjamin Kramer2012-08-181-0/+23
| | | | | | to shrink from double to float. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162173 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r162160 with a fix: Optimize Arith->Trunc->SETCC sequence to allow ↵Nadav Rotem2012-08-182-2/+47
| | | | | | better compare/branch code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162172 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r162160 because it made a few buildbots fail.Nadav Rotem2012-08-182-47/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162164 91177308-0d34-0410-b5e6-96231b3b80d8
* The X86 backend has a number of optimizations for SETCC nodes which useNadav Rotem2012-08-182-2/+47
| | | | | | | | | | | | | | | | | | | | | | | arithmetic instructions. However, when small data types are used, a truncate node appears between the SETCC node and the arithmetic operation. This patch adds support for this pattern. Before: xorl %esi, %edi testb %dil, %dil setne %al ret After: xorb %dil, %sil setne %al ret rdar://12081007 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162160 91177308-0d34-0410-b5e6-96231b3b80d8
* Make atomic load and store of pointers work. Tighten verification of atomic ↵Eli Friedman2012-08-171-0/+22
| | | | | | | | | | | operations so other unexpected operations don't slip through. Based on patch by Logan Chien. PR11786/PR13186. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162146 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid folding ADD instructions with FI operands.Jakob Stoklund Olesen2012-08-171-0/+11
| | | | | | | | | PEI can't handle the pseudo-instructions. This can be removed when the pseudo-instructions are replaced by normal predicated instructions. Fixes PR13628. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162130 91177308-0d34-0410-b5e6-96231b3b80d8
* MemoryBuiltins: Properly guard ObjectSizeOffsetVisitor against cycles in the IR.Benjamin Kramer2012-08-171-1/+2
| | | | | | | | | | The previous fix only checked for simple cycles, use a set to catch longer cycles too. Drop the broken check from the ObjectSizeOffsetEvaluator. The BoundsChecking pass doesn't have to deal with invalid IR like InstCombine does. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162120 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the `linker_private_weak_def_auto' linkage to `linkonce_odr_auto_hide' toBill Wendling2012-08-171-1/+0
| | | | | | | | | | | | | | | | | | | | | make it more consistent with its intended semantics. The `linker_private_weak_def_auto' linkage type was meant to automatically hide globals which never had their addresses taken. It has nothing to do with the `linker_private' linkage type, which outputs the symbols with a `l' (ell) prefix among other things. The intended semantic is more like the `linkonce_odr' linkage type. Change the name of the linkage type to `linkonce_odr_auto_hide'. And therefore changing the semantics so that it produces the correct output for the linker. Note: The old linkage name `linker_private_weak_def_auto' will still parse but is not a synonym for `linkonce_odr_auto_hide'. This should be removed in 4.0. <rdar://problem/11754934> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162114 91177308-0d34-0410-b5e6-96231b3b80d8
* Assert that dominates is not given a multiple edge. Finding out if we haveRafael Espindola2012-08-171-1/+0
| | | | | | | | | | | | | multiple edges between two blocks is linear. If the caller is iterating all edges leaving a BB that would be a square time algorithm. It is more efficient to have the callers handle that case. Currently the only callers are: * GVN: already avoids the multiple edge case. * Verifier: could only hit this assert when looking at an invalid invoke. Since it already rejects the invoke, just avoid computing the dominance for it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162113 91177308-0d34-0410-b5e6-96231b3b80d8
* TargetLowering: Use the large shift amount during legalize types. The ↵Benjamin Kramer2012-08-171-0/+32
| | | | | | legalizer may call us with an overly large type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162101 91177308-0d34-0410-b5e6-96231b3b80d8
* Guard MemoryBuiltins against self-looping GEPs, which can occur in ↵Benjamin Kramer2012-08-171-0/+17
| | | | | | | | unreachable code due to constant propagation. Fixes PR13621. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162098 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix broken check lines.Benjamin Kramer2012-08-1710-28/+27
| | | | | | | | I really need to find a way to automate this, but I can't come up with a regex that has no false positives while handling tricky cases like custom check prefixes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162097 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement NEON domain switching for scalar <-> S-register vmovs on ARMTim Northover2012-08-171-32/+32
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162094 91177308-0d34-0410-b5e6-96231b3b80d8
* Add ADD and SUB to the predicable ARM instructions.Jakob Stoklund Olesen2012-08-163-21/+35
| | | | | | | | | | It is not my plan to duplicate the entire ARM instruction set with predicated versions. We need a way of representing predicated instructions in SSA form without requiring a separate opcode. Then the pseudo-instructions can go away. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162061 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach GVN to reason about edges dominating uses. This allows it to handle casesRafael Espindola2012-08-161-0/+60
| | | | | | | | | | | | | where some fact lake a=b dominates a use in a phi, but doesn't dominate the basic block itself. This feature could also be implemented by splitting critical edges, but at least with the current algorithm reasoning about the dominance directly is faster. The time for running "opt -O2" in the testcase in pr10584 is 1.003 times slower and on gcc as a single file it is 1.0007 times faster. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162023 91177308-0d34-0410-b5e6-96231b3b80d8
* [arm-fast-isel] Add support for fastcc.Jush Lu2012-08-161-0/+66
| | | | | | | | | Without fastcc support, the caller just falls through to CallingConv::C for fastcc, but callee still uses fastcc, this inconsistency of calling convention is a problem, and fastcc support can fix it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162013 91177308-0d34-0410-b5e6-96231b3b80d8
* Test case for r162008.Akira Hatanaka2012-08-161-0/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162009 91177308-0d34-0410-b5e6-96231b3b80d8
* Fold predicable instructions into MOVCC / t2MOVCC.Jakob Stoklund Olesen2012-08-152-1/+61
| | | | | | | | | | | | | | The ARM select instructions are just predicated moves. If the select is the only use of an operand, the instruction defining the operand can be predicated instead, saving one instruction and decreasing register pressure. This implementation can turn AND/ORR/EOR instructions into their corresponding ANDCC/ORRCC/EORCC variants. Ideally, we should be able to predicate any instruction, but we don't yet support predicated instructions in SSA form. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161994 91177308-0d34-0410-b5e6-96231b3b80d8
* Rework test so that it reproduces the error without the horrible flag.Bill Wendling2012-08-151-8/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161989 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove invalid test. This test requires that dead basic blocks be keptBill Wendling2012-08-151-19/+0
| | | | | | | | | | | | | | | | | around. That's not how we do things. Besides, the commit message tells us that it is covered by the GCC test suite. ------------------------------------------------------------------------ r127497 | zwarich | 2011-03-11 13:51:56 -0800 (Fri, 11 Mar 2011) | 3 lines Fix the GCC test suite issue exposed by r127477, which was caused by stack protector insertion not working correctly with unreachable code. Since that revision was rolled out, this test doesn't actual fail before this fix. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161985 91177308-0d34-0410-b5e6-96231b3b80d8
* Use vld1/vst1 to load/store f64 if alignment is < 4 and the target allows ↵Evan Cheng2012-08-151-17/+49
| | | | | | unaligned access. rdar://12091029 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161962 91177308-0d34-0410-b5e6-96231b3b80d8
* fix infinite loop in instcombine with more than 4GB memcpyMichael Liao2012-08-151-0/+8
| | | | | | | | | | | | | | - memcpy size is wrongly truncated into 32-bit and treat 8GB memcpy is 0-sized memcpy - as 0-sized memcpy/memset is already removed before SimplifyMemTransfer and SimplifyMemSet in visitCallInst, replace 0 checking with assertions. - replace getZExtValue() with getLimitedValue() according to Eli Friedman git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161923 91177308-0d34-0410-b5e6-96231b3b80d8
* The names of VFP variants of half-to-float conversion instructions wereAnton Korobeynikov2012-08-141-3/+3
| | | | | | | | | reversed. This leads to wrong codegen for float-to-half conversion intrinsics which are used to support storage-only fp16 type. NEON variants of same instructions are fine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161907 91177308-0d34-0410-b5e6-96231b3b80d8
* fix PR11334Michael Liao2012-08-141-0/+56
| | | | | | | | | | | | | | - FP_EXTEND only support extending from vectors with matching elements. This results in the scalarization of extending to v2f64 from v2f32, which will be legalized to v4f32 not matching with v2f64. - add X86-specific VFPEXT supproting extending from v4f32 to v2f64. - add BUILD_VECTOR lowering helper to recover back the original extending from v4f32 to v2f64. - test case is enhanced to include different vector width. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161894 91177308-0d34-0410-b5e6-96231b3b80d8
* [asan] insert crash basic blocks inline as opposed to inserting them at the ↵Kostya Serebryany2012-08-141-10/+8
| | | | | | end of the function. This doesn't seem to fix or break anything, but is considered to be more friendly to downstream passes (test change) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161871 91177308-0d34-0410-b5e6-96231b3b80d8
* Change greater than to greater than or equal so that an identical sized ↵Craig Topper2012-08-141-0/+19
| | | | | | store to the same offset is treated as completing overwriting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161857 91177308-0d34-0410-b5e6-96231b3b80d8
* During the CodeGenPrepare we often lower intrinsics (such as objsize)Nadav Rotem2012-08-147-22/+23
| | | | | | | | | | | | | and allow some optimizations to turn conditional branches into unconditional. This commit adds a simple control-flow optimization which merges two consecutive basic blocks which are connected by a single edge. This allows the codegen to operate on larger basic blocks. rdar://11973998 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161852 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/test/CodeGen/ARM/floorf.ll: Add explicit -mtriple=arm-unknown-unknown, ↵NAKAMURA Takumi2012-08-141-1/+1
| | | | | | or it fails on msvc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161825 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a roundToIntegral method to APFloat, which can be parameterized over ↵Owen Anderson2012-08-131-0/+29
| | | | | | various rounding modes. Use this to implement SelectionDAG constant folding of FFLOOR, FCEIL, and FTRUNC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161807 91177308-0d34-0410-b5e6-96231b3b80d8
* MemoryDependenceAnalysis attempts to find the first memory dependency for ↵Nadav Rotem2012-08-131-0/+34
| | | | | | | | | | | | | function calls. Currently, if GetLocation reports that it did not find a valid pointer (this is the case for volatile load/stores), we ignore the result. This patch adds code to handle the cases where we did not obtain a valid pointer. rdar://11872864 PR12899 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161802 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Move Thumb2 tests to Thumb2 test file and fix CHECK lines.Jim Grosbach2012-08-132-8/+10
| | | | | | These tests weren't actually being run before (missing ':' after CHECK). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161800 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename test since it's not linux-specific.Bill Wendling2012-08-131-0/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161792 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle extra Tail predecessors in if-conversion.Jakob Stoklund Olesen2012-08-131-0/+30
| | | | | | | | It is still possible to if-convert if the tail block has extra predecessors, but the tail phis must be rewritten instead of being removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161781 91177308-0d34-0410-b5e6-96231b3b80d8
* [Hexagon] Don't mark callee saved registers as clobbered by a tail callArnold Schwaighofer2012-08-131-0/+14
| | | | | | | | | | | | This was causing unnecessary spills/restores of callee saved registers. Fixes PR13572. Patch by Pranav Bhandarkar! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161778 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix failure on Atom bot due to r161769Manman Ren2012-08-131-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161777 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not optimize (or (and X,Y), Z) into BFI and other sequences if the AND ↵Nadav Rotem2012-08-131-0/+17
| | | | | | | | | | ISDNode has more than one user. rdar://11876519 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161775 91177308-0d34-0410-b5e6-96231b3b80d8
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