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* Fix a couple of logic bugs in TargetLowering::SimplifyDemandedBits. PR11514.Eli Friedman2011-12-091-0/+16
* Fix infinite loop in DSE when deleting a free in a reachable loop that's alsoNick Lewycky2011-12-081-0/+10
* Add 256-bit variant vmovss and vmovsd patterns. rdar://10538417Evan Cheng2011-12-081-0/+10
* ARM 64-bit VEXT assembly uses a .64 suffix, not .32, amazingly enough.Jim Grosbach2011-12-081-0/+4
* ARM VSHR implied destination operand form aliases.Jim Grosbach2011-12-081-0/+35
* Add various missing AVX patterns which was causing crashes. Sadly, the generatedEvan Cheng2011-12-081-0/+63
* Tidy up a bit.Jim Grosbach2011-12-081-32/+37
* ARM VSUB implied destination operand form aliases.Jim Grosbach2011-12-081-1/+24
* Tidy up a bit.Jim Grosbach2011-12-081-10/+13
* ARM VQADD implied destination operand form aliases.Jim Grosbach2011-12-081-16/+58
* ARM a few more VMUL implied destination operand form aliases.Jim Grosbach2011-12-081-1/+22
* Teach SelectionDAG to match more calls to libm functions onto existing SDNode...Owen Anderson2011-12-081-2/+2
* Add test for r146163.Evan Cheng2011-12-081-0/+3
* Revert r146143, "Fix bug 9905: Failure in code selection for llvm intrinsicsDaniel Dunbar2011-12-081-302/+0
* test/CodeGen/X86/vec_compare-2.ll: Add explicit -mtriple=i686-linux.NAKAMURA Takumi2011-12-081-1/+1
* Fix a bug in the integer-promotion of bitcast operations on vector types.Nadav Rotem2011-12-083-1/+17
* Fix bug 9905: Failure in code selection for llvm intrinsics sqrt/exp (fix for...Stepan Dyatkovskiy2011-12-081-0/+302
* ARM NEON two-operand aliases for VSHL(immediate).Jim Grosbach2011-12-081-0/+20
* ARM NEON two-operand aliases for VSHL(register).Jim Grosbach2011-12-081-0/+41
* ARM optional destination operand variants for VEXT instructions.Jim Grosbach2011-12-081-0/+15
* Tidy up.Jim Grosbach2011-12-081-22/+29
* ARM assembler aliases for "add Rd, #-imm" to "sub Rd, #imm".Jim Grosbach2011-12-081-1/+6
* ARM assembly, allow 'asl' as a synonym for 'lsl' in shifted-register operands.Jim Grosbach2011-12-071-0/+2
* 32 to 64-bit zext pattern.Akira Hatanaka2011-12-071-0/+11
* ARM two-operand aliases for VAND/VEOR/VORR instructions.Jim Grosbach2011-12-071-0/+31
* ARM two-operand aliases for VADDW instructions.Jim Grosbach2011-12-071-0/+17
* ARM two-operand aliases for VADD instructions.Jim Grosbach2011-12-071-0/+23
* 64-bit WrapperPICPat patterns.Akira Hatanaka2011-12-071-8/+15
* Modify LowerFCOPYSIGN to handle Mips64.Akira Hatanaka2011-12-071-38/+46
* Fix 64-bit immediate patterns.Akira Hatanaka2011-12-071-0/+35
* Darwin assembler improved relocs when w/o subsections_via_symbols.Jim Grosbach2011-12-073-1/+7
* Thumb2 alias for long-form pop and friends.Jim Grosbach2011-12-071-0/+2
* ARM support the .arm and .thumb directives for assembly mode switching.Jim Grosbach2011-12-071-0/+11
* ARM NEON VCLT(register) is a pseudo aliasing VCGT(register).Jim Grosbach2011-12-071-0/+33
* Tidy up. Move MachO tests to MachO directory.Jim Grosbach2011-12-077-0/+0
* Support vector bitcasts in the AsmPrinter. PR11495.Eli Friedman2011-12-071-0/+5
* Fix an optimization involving EXTRACT_SUBVECTOR in DAGCombine so it behaves c...Eli Friedman2011-12-071-0/+18
* delaying restore-cr changed assigned registers in some testsHal Finkel2011-12-062-9/+9
* add a test case that uses RESTORE_CRHal Finkel2011-12-061-0/+225
* PTX: Continue to fix up the register mess.Justin Holewinski2011-12-062-6/+6
* Fix a bunch of SSE/AVX patterns to use v2i64/v4i64 loads since all other inte...Craig Topper2011-12-061-0/+6
* test/MC: Introduce MC/MachO/ARM, and relocate relax-thumb2-branches.s into it.NAKAMURA Takumi2011-12-062-0/+5
* ARM mode 'mul' operand ordering tweak.Jim Grosbach2011-12-061-1/+0
* Thumb2: MUL two-operand form encoding operand order fix.Jim Grosbach2011-12-061-2/+2
* Merge isSHUFPMask and isCommutedSHUFPMask into single function that can do bo...Craig Topper2011-12-062-2/+9
* Thumb2 encoding choice correction for PLD.Jim Grosbach2011-12-061-0/+4
* test/MC: Move relax-thumb2-branches.s from MC/MachO/ to MC/ARM.NAKAMURA Takumi2011-12-061-0/+0
* LSR: prune undesirable formulae early.Andrew Trick2011-12-061-0/+96
* [arm-fast-isel] Doublewords only require word-alignment.Chad Rosier2011-12-061-0/+18
* Align ARM constant pool islands via their basic block.Jakob Stoklund Olesen2011-12-061-1/+0
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