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* Fix X86TargetLowering::LowerExternalSymbol so that it actually works in non-t...Eli Friedman2011-08-111-0/+24
* ARM tests for LDRSHT assembly parsing and encoding.Jim Grosbach2011-08-101-0/+15
* ARM tests for LDRSH assembly parsing and encoding.Jim Grosbach2011-08-101-0/+36
* ARM tests for LDRSBT assembly parsing and encoding.Jim Grosbach2011-08-101-0/+12
* ARM tests for LDRSB assembly parsing and encoding.Jim Grosbach2011-08-101-0/+36
* Add FIXME.Jim Grosbach2011-08-101-0/+5
* ARM tests for LDRHT assembly parsing and encoding.Jim Grosbach2011-08-101-0/+14
* test/CodeGen/X86/opt-shuff-tstore.ll: Add explicit -mtriple=x86_64-linux.NAKAMURA Takumi2011-08-101-1/+1
* ARM tests for LDRH(register) assembly parsing and encoding.Jim Grosbach2011-08-101-0/+16
* ARM LDRH(immediate) assembly parsing and encoding support.Jim Grosbach2011-08-101-4/+20
* Add FIXMEJim Grosbach2011-08-101-0/+4
* ARM LDRD(register) assembly parsing and encoding.Jim Grosbach2011-08-101-0/+20
* While extending definition range of a debug variable, consult lexical scopes ...Devang Patel2011-08-102-3/+3
* ARM LDRD(immediate) assembly parsing and encoding support.Jim Grosbach2011-08-102-0/+28
* Fix the test. Add cpu target.Nadav Rotem2011-08-101-1/+1
* When performing a truncating store, it is sometimes possible to rearrange theNadav Rotem2011-08-101-0/+39
* Add initial support for decoding NEON instructions in Thumb2 mode.Owen Anderson2011-08-101-0/+3
* The following X86 pattern is incorrect:Bruno Cardoso Lopes2011-08-101-2/+22
* Add support for the R and Q constraints.Rafael Espindola2011-08-101-0/+17
* Invoke SimplifyIndVar when we partially unroll a loop. Fixes PR10534.Andrew Trick2011-08-101-0/+39
* Fix a bug in vpermilps mask checking. Fix PR10560Bruno Cardoso Lopes2011-08-101-0/+6
* Remove the build_unwind function from the OCaml bindings.Peter Collingbourne2011-08-101-8/+0
* Fix the LoopUnroller to handle nontrivial loops and partial unrolling.Andrew Trick2011-08-102-0/+162
* Push GPRnopc through a large number of instruction definitions to tighten ope...Owen Anderson2011-08-106-14/+8
* Tighten operand checking of register-shifted-register operands.Owen Anderson2011-08-092-4/+2
* Add 256-bit support for v8i32, v4i64 and v4f64 ISD::SELECT. Fix PR10556Bruno Cardoso Lopes2011-08-091-0/+22
* Tighten operand checking on memory barrier instructions.Owen Anderson2011-08-093-9/+6
* Tighten operand checking on CPS instructions.Owen Anderson2011-08-092-2/+0
* Create a new register class for the set of all GPRs except the PC. Use it to...Owen Anderson2011-08-091-1/+0
* Add v16i16 and v32i8 store patternsBruno Cardoso Lopes2011-08-091-0/+24
* Use fp unpack instructions to unpack int types. Until we have AVX2, thisBruno Cardoso Lopes2011-08-091-0/+31
* Fix a couple ridiculous copy-paste errors. rdar://9914773 .Eli Friedman2011-08-091-10/+43
* ARM Disassembler: sign extend branch immediates.Benjamin Kramer2011-08-091-0/+3
* Tighten Thumb1 branch predicate decoding.Owen Anderson2011-08-091-1/+0
* Replace the existing ARM disassembler with a new one based on the FixedLenDec...Owen Anderson2011-08-0946-25/+60
* Revert r137134. It breaks some code as Eli pointed out.Bill Wendling2011-08-091-11/+0
* Print out the variable declaration only if it is a declaration. Otherwise, aBill Wendling2011-08-091-0/+11
* Inflate register classes after coalescing.Jakob Stoklund Olesen2011-08-092-3/+7
* Reapply a more appropriate solution than in r137114. AVX supportsBruno Cardoso Lopes2011-08-091-0/+12
* Revert r137114Bruno Cardoso Lopes2011-08-091-7/+0
* PTX: Add initial support for device function callsJustin Holewinski2011-08-091-0/+14
* Handle sitofp between v4f64 <- v4i32. Fix PR10559Bruno Cardoso Lopes2011-08-091-0/+7
* Add support for avx vector fextendBruno Cardoso Lopes2011-08-091-0/+6
* Rename and tidy up testsBruno Cardoso Lopes2011-08-0910-70/+66
* Add two patterns to match special vmovss and vmovsd cases. Also fixBruno Cardoso Lopes2011-08-091-0/+18
* Make LowerVSETCC aware of AVX types and add patterns to match them.Bruno Cardoso Lopes2011-08-091-0/+18
* Tidy up these testcases to look more like real code does.Dan Gohman2011-08-091-9/+9
* ARM parsing and encoding for LDRBT instruction.Jim Grosbach2011-08-081-0/+16
* ARM parsing and encoding for LDRB instruction.Jim Grosbach2011-08-081-0/+38
* Add FIXME.Jim Grosbach2011-08-081-0/+7
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