| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | XCore target: Fix Vararg handling | Robert Lytton | 2013-08-01 | 2 | -17/+55 |
| * | XCore target: Add byval handling | Robert Lytton | 2013-08-01 | 1 | -0/+58 |
| * | Xcore target | Robert Lytton | 2013-08-01 | 1 | -0/+4 |
| * | Fix some misc. issues with Mips16 fp stubs. | Reed Kotler | 2013-08-01 | 1 | -48/+50 |
| * | Added the B9.3.19 SUBS PC, LR, #imm (Thumb2) system instruction. | Kevin Enderby | 2013-07-31 | 2 | -0/+6 |
| * | Revert "R600: Non vector only instruction can be scheduled on trans unit" | Tom Stellard | 2013-07-31 | 25 | -185/+73 |
| * | R600: Avoid more than 4 literals in the same instruction group at scheduling | Vincent Lejeune | 2013-07-31 | 1 | -0/+68 |
| * | R600: Non vector only instruction can be scheduled on trans unit | Vincent Lejeune | 2013-07-31 | 25 | -73/+185 |
| * | Reject bitcasts between address spaces with different sizes | Matt Arsenault | 2013-07-31 | 9 | -0/+97 |
| * | [SystemZ] Implement isLegalAddressingMode() | Richard Sandiford | 2013-07-31 | 1 | -0/+25 |
| * | [SystemZ] Be more careful about inverting CC masks (conditional loads) | Richard Sandiford | 2013-07-31 | 2 | -14/+14 |
| * | [SystemZ] Be more careful about inverting CC masks | Richard Sandiford | 2013-07-31 | 47 | -124/+149 |
| * | [SystemZ] Move compare-and-branch generation even later | Richard Sandiford | 2013-07-31 | 1 | -0/+45 |
| * | [SystemZ] Postpone NI->RISBG conversion to convertToThreeAddress() | Richard Sandiford | 2013-07-31 | 29 | -431/+446 |
| * | Added INSERT and EXTRACT intructions from AVX-512 ISA. | Elena Demikhovsky | 2013-07-31 | 1 | -0/+44 |
| * | [SystemZ] Add RISBLG and RISBHG instruction definitions | Richard Sandiford | 2013-07-31 | 4 | -0/+124 |
| * | Changed register names (and pointer keywords) to be lower case when using Int... | Craig Topper | 2013-07-31 | 7 | -44/+44 |
| * | Preserve fast-math flags when folding (fsub x, (fneg y)) to (fadd x, y). | Owen Anderson | 2013-07-30 | 1 | -0/+11 |
| * | isKnownToBeAPowerOfTwo: Strengthen isKnownToBeAPowerOfTwo's analysis on add i... | David Majnemer | 2013-07-30 | 1 | -0/+32 |
| * | Change behavior of calling bitcasted alias functions. | Matt Arsenault | 2013-07-30 | 6 | -59/+295 |
| * | This test may have been sensitive to the ARM ABI... | Andrew Trick | 2013-07-30 | 1 | -1/+1 |
| * | MI Sched fix: assert "Disconnected LRG within the scheduling region." | Andrew Trick | 2013-07-30 | 1 | -1/+54 |
| * | R600/SI: Expand vector fp <-> int conversions | Tom Stellard | 2013-07-30 | 4 | -36/+36 |
| * | This patch implements parsing of mips FCC register operands. The example inst... | Vladimir Medic | 2013-07-30 | 1 | -0/+6 |
| * | [ARM] check bitwidth in PerformORCombine | Saleem Abdulrasool | 2013-07-30 | 1 | -0/+32 |
| * | [R600] Replicate old DAGCombiner behavior in target specific DAG combine. | Quentin Colombet | 2013-07-30 | 1 | -1/+0 |
| * | [DAGCombiner] insert_vector_elt: Avoid building a vector twice. | Quentin Colombet | 2013-07-30 | 7 | -26/+53 |
| * | Move file to X86 and add a triple to fix darwin bots for now. | Eric Christopher | 2013-07-30 | 1 | -1/+1 |
| * | Fix a truly egregious thinko in anonymous namespace check, | Eric Christopher | 2013-07-29 | 1 | -66/+125 |
| * | Make sure we don't emit an ODR hash for types with no name and make | Eric Christopher | 2013-07-29 | 1 | -19/+60 |
| * | Clarify comments for types contained in anonymous namespaces and | Eric Christopher | 2013-07-29 | 1 | -1/+3 |
| * | Debug Info: enable verifier for testing cases. | Manman Ren | 2013-07-29 | 10 | -11/+11 |
| * | Add the C source code to the test to make it easier to update when debug info... | Nadav Rotem | 2013-07-29 | 1 | -0/+9 |
| * | SLPVectorier: update the debug location for the new instructions. | Nadav Rotem | 2013-07-29 | 1 | -0/+82 |
| * | Debug Info: update testing cases to pass verifier. | Manman Ren | 2013-07-29 | 37 | -208/+237 |
| * | Use proper section suffix for COFF weak symbols | Nico Rieck | 2013-07-29 | 2 | -25/+44 |
| * | Proper va_arg/va_copy lowering on win64 | Nico Rieck | 2013-07-29 | 1 | -0/+60 |
| * | Add support for the 's' operation to llvm-ar. | Rafael Espindola | 2013-07-29 | 2 | -0/+32 |
| * | MC: Support larger COFF string tables | Nico Rieck | 2013-07-29 | 1 | -0/+62 |
| * | Allow generation of vmla.f32 instructions when targeting Cortex-A15. The patc... | Silviu Baranga | 2013-07-29 | 1 | -1/+25 |
| * | Don't vectorize when the attribute NoImplicitFloat is used. | Nadav Rotem | 2013-07-29 | 1 | -0/+25 |
| * | DwarfDebug: MD5 is always little endian, bswap on big endian platforms. | Benjamin Kramer | 2013-07-27 | 1 | -0/+0 |
| * | SimplifyCFG: Add missing tests from r187278 | Tom Stellard | 2013-07-27 | 3 | -0/+125 |
| * | Debug Info Verifier: verify SPs in llvm.dbg.sp. | Manman Ren | 2013-07-27 | 37 | -161/+200 |
| * | SLP Vectorier: Don't vectorize really short chains because they are already ... | Nadav Rotem | 2013-07-26 | 1 | -1/+3 |
| * | SLP Vectorizer: Disable the vectorization of non power of two chains, such as... | Nadav Rotem | 2013-07-26 | 2 | -33/+39 |
| * | Use pipefail when available. | Rafael Espindola | 2013-07-26 | 1 | -0/+2 |
| * | next batch of -disable-debug-info-verifier | Rafael Espindola | 2013-07-26 | 5 | -5/+5 |
| * | When InstCombine tries to fold away (fsub x, (fneg y)) into (fadd x, y), it is | Owen Anderson | 2013-07-26 | 1 | -0/+12 |
| * | [mips] Implement llvm.trap intrinsic. | Akira Hatanaka | 2013-07-26 | 1 | -0/+11 |
