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* Re-apply 75490, 75806 and 76177 with fixes and tests. Efficiency comesDavid Greene2009-07-204-1/+2925
* Forgot this test earlier.Evan Cheng2009-07-201-0/+1323
* Assembly and Bitcode support for unsigned/signed overflow flags andDan Gohman2009-07-205-0/+202
* Use TII->findCommutedOpIndices to find the commute operands (rather than gues...Evan Cheng2009-07-201-0/+11
* Removed the DumpSymbolsandMacros and LoadSymbolsandMacros MCStreamer API asKevin Enderby2009-07-201-8/+0
* Fix some sub-reg coalescing bugs where the coalescer wasn't updating the resu...Evan Cheng2009-07-202-0/+198
* Revert the addition of hasNoPointerOverflow to GEPOperator.Dan Gohman2009-07-205-132/+35
* xfail for now.Evan Cheng2009-07-201-0/+1
* implement a new magic global "llvm.compiler.used" which is like llvm.used, butChris Lattner2009-07-201-0/+9
* Restore AsmWriterEmitter.cpp back to 74742. The recent changes broke Thumb.Evan Cheng2009-07-201-0/+288
* This test should be run with -m32.Daniel Dunbar2009-07-191-1/+1
* Fix http://llvm.org/bugs/show_bug.cgi?id=4583Jakob Stoklund Olesen2009-07-191-0/+11
* Canonicalize bitcasts between types like <1 x i64> and i64 to Eli Friedman2009-07-181-0/+22
* Back out 76300; apparently the preference is to canonicalize the other Eli Friedman2009-07-181-12/+0
* Add combine: X sdiv (1 << Y) -> X udiv (1 << Y) when X doesn't have the Eli Friedman2009-07-181-0/+9
* Canonicalize insert/extractelement from single-element vectors into Eli Friedman2009-07-181-0/+12
* Fix simplifylibcalls memset recognition to work on 64-bit platforms Eli Friedman2009-07-181-0/+12
* Catch more coalescing opportunities.Evan Cheng2009-07-182-3/+3
* Enable cross register class coalescing.Evan Cheng2009-07-185-5/+48
* Fix pr4552. Stack slot coloring with register must take care not to generate ...Evan Cheng2009-07-171-0/+55
* llvm-mc: Add -triple, and start fetching the target asm printer.Daniel Dunbar2009-07-1720-25/+25
* Fix x86 inline ams 'q' constraint support. In 32-bit mode, it's just like 'Q'...Evan Cheng2009-07-171-0/+10
* rename test.Chris Lattner2009-07-171-0/+0
* Testcase for PR4214.Duncan Sands2009-07-171-0/+4
* Make promotion in operation legalization for SETCC work correctly.Eli Friedman2009-07-171-0/+6
* Emit cross regclass register moves for thumb2.Anton Korobeynikov2009-07-161-0/+35
* Assume an inline asm might be a call, so we getDale Johannesen2009-07-161-1/+1
* Emit line numbers in asm comments when available.David Greene2009-07-161-0/+27
* Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm ope...Jakob Stoklund Olesen2009-07-161-0/+16
* Changed my mind. We now allow remat of instructions whose defs have subreg in...Evan Cheng2009-07-161-4/+1
* this should be xfailed on darwin. Darwin doesn't use the libstdc++ in the ll...Chris Lattner2009-07-161-0/+1
* With recent MC changes, RIP base register is explicitly modeled. Make sure we...Evan Cheng2009-07-161-0/+102
* Fill in some holes in ScalarEvolution's loop iteration conditionDan Gohman2009-07-161-0/+38
* Make xfail properAnton Korobeynikov2009-07-161-1/+1
* Temporary disable 16 bit bswapAnton Korobeynikov2009-07-161-0/+1
* Add bswap patternsAnton Korobeynikov2009-07-161-0/+48
* Fix logic inversion for RI-mode address selectionAnton Korobeynikov2009-07-161-0/+32
* Unbreak the testAnton Korobeynikov2009-07-161-1/+2
* Expand 32-bit bitconverts via memoryAnton Korobeynikov2009-07-161-0/+15
* Fix incomin arg stack frame offset in case we need to generate stack frameAnton Korobeynikov2009-07-161-0/+22
* Revert the commit, it just hides the real bugAnton Korobeynikov2009-07-167-182/+14
* Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension ...Anton Korobeynikov2009-07-167-14/+182
* Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide...Anton Korobeynikov2009-07-162-5/+5
* Implement 'large' PIC modelAnton Korobeynikov2009-07-162-0/+56
* Implement shifts properly (hopefilly - finally!)Anton Korobeynikov2009-07-161-0/+25
* Properly handle divides. As a bonus - implement memory versions of them.Anton Korobeynikov2009-07-162-4/+68
* 32 bit shifts have only 12 bit displacementsAnton Korobeynikov2009-07-161-0/+27
* Consolidate reg-imm / reg-reg-imm address mode selection logic in one place.Anton Korobeynikov2009-07-161-1/+16
* Add support for 12 bit displacementsAnton Korobeynikov2009-07-163-3/+132
* Emit proper lowering of load from arg stack slotAnton Korobeynikov2009-07-161-0/+19
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