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* Re-apply 75490, 75806 and 76177 with fixes and tests. Efficiency comesDavid Greene2009-07-204-1/+2925
| | | | | | | next. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76486 91177308-0d34-0410-b5e6-96231b3b80d8
* Forgot this test earlier.Evan Cheng2009-07-201-0/+1323
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76485 91177308-0d34-0410-b5e6-96231b3b80d8
* Assembly and Bitcode support for unsigned/signed overflow flags andDan Gohman2009-07-205-0/+202
| | | | | | | exact sdiv flags. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76475 91177308-0d34-0410-b5e6-96231b3b80d8
* Use TII->findCommutedOpIndices to find the commute operands (rather than ↵Evan Cheng2009-07-201-0/+11
| | | | | | guessing). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76472 91177308-0d34-0410-b5e6-96231b3b80d8
* Removed the DumpSymbolsandMacros and LoadSymbolsandMacros MCStreamer API asKevin Enderby2009-07-201-8/+0
| | | | | | | | | | the parsing of the .dump and .load should be done in the assembly parser and not have any need for an MCStreamer API. Changed the code for now so these just produce an error saying these specific directives are not yet implemented since they are likely no longer used and may never need to be implemented. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76462 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix some sub-reg coalescing bugs where the coalescer wasn't updating the ↵Evan Cheng2009-07-202-0/+198
| | | | | | resulting interval's register class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76458 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert the addition of hasNoPointerOverflow to GEPOperator.Dan Gohman2009-07-205-132/+35
| | | | | | | | | | | | | Getelementptrs that are defined to wrap are virtually useless to optimization, and getelementptrs that are undefined on any kind of overflow are too restrictive -- it's difficult to ensure that all intermediate addresses are within bounds. I'm going to take a different approach. Remove a few optimizations that depended on this flag. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76437 91177308-0d34-0410-b5e6-96231b3b80d8
* xfail for now.Evan Cheng2009-07-201-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76423 91177308-0d34-0410-b5e6-96231b3b80d8
* implement a new magic global "llvm.compiler.used" which is like llvm.used, butChris Lattner2009-07-201-0/+9
| | | | | | | doesn't cause ".no_dead_strip" to be emitted on darwin. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76399 91177308-0d34-0410-b5e6-96231b3b80d8
* Restore AsmWriterEmitter.cpp back to 74742. The recent changes broke Thumb.Evan Cheng2009-07-201-0/+288
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76398 91177308-0d34-0410-b5e6-96231b3b80d8
* This test should be run with -m32.Daniel Dunbar2009-07-191-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76382 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix http://llvm.org/bugs/show_bug.cgi?id=4583Jakob Stoklund Olesen2009-07-191-0/+11
| | | | | | | | Inline asm instructions may have additional <imp-def,kill> register operands. These operands are not marked with a flag like the normal asm operands, so we must not assert that there is a flag. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76373 91177308-0d34-0410-b5e6-96231b3b80d8
* Canonicalize bitcasts between types like <1 x i64> and i64 to Eli Friedman2009-07-181-0/+22
| | | | | | | | | | | | insertelement/extractelement. I'm not entirely sure this is precisely what we want to do: should we prefer bitcast(insertelement) or insertelement(bitcast)? Similarly. should we prefer extractelement(bitcast) or bitcast(extractelement)? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76345 91177308-0d34-0410-b5e6-96231b3b80d8
* Back out 76300; apparently the preference is to canonicalize the other Eli Friedman2009-07-181-12/+0
| | | | | | | | way (bitcast -> insert/extractelement). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76325 91177308-0d34-0410-b5e6-96231b3b80d8
* Add combine: X sdiv (1 << Y) -> X udiv (1 << Y) when X doesn't have the Eli Friedman2009-07-181-0/+9
| | | | | | | | sign bit set. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76304 91177308-0d34-0410-b5e6-96231b3b80d8
* Canonicalize insert/extractelement from single-element vectors into Eli Friedman2009-07-181-0/+12
| | | | | | | | | | | bitcasts. It would also be possible to canonicalize the other way; does anyone have a preference? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76300 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix simplifylibcalls memset recognition to work on 64-bit platforms Eli Friedman2009-07-181-0/+12
| | | | | | | | where int is 32 bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76293 91177308-0d34-0410-b5e6-96231b3b80d8
* Catch more coalescing opportunities.Evan Cheng2009-07-182-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76282 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable cross register class coalescing.Evan Cheng2009-07-185-5/+48
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76281 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix pr4552. Stack slot coloring with register must take care not to generate ↵Evan Cheng2009-07-171-0/+55
| | | | | | illegal ams. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76258 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc: Add -triple, and start fetching the target asm printer.Daniel Dunbar2009-07-1720-25/+25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76257 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix x86 inline ams 'q' constraint support. In 32-bit mode, it's just like ↵Evan Cheng2009-07-171-0/+10
| | | | | | 'Q', i.e. EAX, EDX, ECX, EBX. In 64-bit mode, it just means all the i64r registers. Yeah, that makes sense. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76248 91177308-0d34-0410-b5e6-96231b3b80d8
* rename test.Chris Lattner2009-07-171-0/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76197 91177308-0d34-0410-b5e6-96231b3b80d8
* Testcase for PR4214.Duncan Sands2009-07-171-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76174 91177308-0d34-0410-b5e6-96231b3b80d8
* Make promotion in operation legalization for SETCC work correctly.Eli Friedman2009-07-171-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76153 91177308-0d34-0410-b5e6-96231b3b80d8
* Emit cross regclass register moves for thumb2.Anton Korobeynikov2009-07-161-0/+35
| | | | | | Minor code duplication cleanup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76124 91177308-0d34-0410-b5e6-96231b3b80d8
* Assume an inline asm might be a call, so we getDale Johannesen2009-07-161-1/+1
| | | | | | | | | | | stack alignment right when it is. This is not ideal but conservatively correct. Adjust a test to compensate for changed stack offset value. gcc.apple/asm-block-57.c git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76120 91177308-0d34-0410-b5e6-96231b3b80d8
* Emit line numbers in asm comments when available.David Greene2009-07-161-0/+27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76117 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm ↵Jakob Stoklund Olesen2009-07-161-0/+16
| | | | | | | | | | | operands. The inline asm operands must be parsed from the first flag, you cannot assume that an immediate operand preceeding a register use operand is the flag. PowerPC "m" operands are represented as (flag, imm, reg) triples. isRegTiedToDefOperand() would incorrectly interpret the imm as the flag. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76101 91177308-0d34-0410-b5e6-96231b3b80d8
* Changed my mind. We now allow remat of instructions whose defs have subreg ↵Evan Cheng2009-07-161-4/+1
| | | | | | indices. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76100 91177308-0d34-0410-b5e6-96231b3b80d8
* this should be xfailed on darwin. Darwin doesn't use the libstdc++ in the ↵Chris Lattner2009-07-161-0/+1
| | | | | | llvm-gcc distro, it uses the system version. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76095 91177308-0d34-0410-b5e6-96231b3b80d8
* With recent MC changes, RIP base register is explicitly modeled. Make sure ↵Evan Cheng2009-07-161-0/+102
| | | | | | we add it when x86 V_SET0 / V_SETALLONES (by transforming it into a constpool load) into the use instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76094 91177308-0d34-0410-b5e6-96231b3b80d8
* Fill in some holes in ScalarEvolution's loop iteration conditionDan Gohman2009-07-161-0/+38
| | | | | | | | analysis. This allows indvars to emit a simpler loop trip count expression. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76085 91177308-0d34-0410-b5e6-96231b3b80d8
* Make xfail properAnton Korobeynikov2009-07-161-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76065 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporary disable 16 bit bswapAnton Korobeynikov2009-07-161-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76063 91177308-0d34-0410-b5e6-96231b3b80d8
* Add bswap patternsAnton Korobeynikov2009-07-161-0/+48
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76061 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix logic inversion for RI-mode address selectionAnton Korobeynikov2009-07-161-0/+32
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76052 91177308-0d34-0410-b5e6-96231b3b80d8
* Unbreak the testAnton Korobeynikov2009-07-161-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76051 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand 32-bit bitconverts via memoryAnton Korobeynikov2009-07-161-0/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76050 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix incomin arg stack frame offset in case we need to generate stack frameAnton Korobeynikov2009-07-161-0/+22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76049 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert the commit, it just hides the real bugAnton Korobeynikov2009-07-167-182/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76045 91177308-0d34-0410-b5e6-96231b3b80d8
* Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension ↵Anton Korobeynikov2009-07-167-14/+182
| | | | | | side effects git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76035 91177308-0d34-0410-b5e6-96231b3b80d8
* Provide consistent subreg idx scheme. This (hopefully) fixes remaining ↵Anton Korobeynikov2009-07-162-5/+5
| | | | | | divide problems git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76011 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement 'large' PIC modelAnton Korobeynikov2009-07-162-0/+56
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76006 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement shifts properly (hopefilly - finally!)Anton Korobeynikov2009-07-161-0/+25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76005 91177308-0d34-0410-b5e6-96231b3b80d8
* Properly handle divides. As a bonus - implement memory versions of them.Anton Korobeynikov2009-07-162-4/+68
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76003 91177308-0d34-0410-b5e6-96231b3b80d8
* 32 bit shifts have only 12 bit displacementsAnton Korobeynikov2009-07-161-0/+27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76000 91177308-0d34-0410-b5e6-96231b3b80d8
* Consolidate reg-imm / reg-reg-imm address mode selection logic in one place.Anton Korobeynikov2009-07-161-1/+16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75990 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for 12 bit displacementsAnton Korobeynikov2009-07-163-3/+132
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75988 91177308-0d34-0410-b5e6-96231b3b80d8
* Emit proper lowering of load from arg stack slotAnton Korobeynikov2009-07-161-0/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75986 91177308-0d34-0410-b5e6-96231b3b80d8
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