| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Use getRegForValue() to materialize the address of ARM globals. | Jakob Stoklund Olesen | 2012-01-07 | 2 | -28/+16 |
| * | LSR: Don't optimize loops if an outer loop has no preheader. | Andrew Trick | 2012-01-07 | 1 | -3/+41 |
| * | Split Finish into Finish and FinishImpl to have a common place to do end of | Rafael Espindola | 2012-01-07 | 1 | -0/+5 |
| * | Added a late machine instruction copy propagation pass. This catches | Evan Cheng | 2012-01-07 | 2 | -3/+39 |
| * | Use movw+movt in ARMFastISel::ARMMaterializeGV. | Jakob Stoklund Olesen | 2012-01-07 | 2 | -14/+28 |
| * | Extended replaceCongruentPhis to handle mixed phi types. | Andrew Trick | 2012-01-07 | 1 | -2/+2 |
| * | Make the 'x' constraint work for AVX registers as well. | Eric Christopher | 2012-01-07 | 1 | -1/+9 |
| * | comment typo | Andrew Trick | 2012-01-07 | 1 | -1/+1 |
| * | Enable aligned NEON spilling by default. | Jakob Stoklund Olesen | 2012-01-06 | 2 | -3/+3 |
| * | Fix SpeculativelyExecuteBB to either speculate all or none of the phis | Dan Gohman | 2012-01-05 | 5 | -6/+55 |
| * | PR11705, part 2: globalopt shouldn't put inttoptr/ptrtoint operations into gl... | Eli Friedman | 2012-01-05 | 1 | -4/+15 |
| * | Link symbols with different visibilities according to the rules in the | Rafael Espindola | 2012-01-05 | 2 | -0/+73 |
| * | Revert r56315. When the instruction to speculate is a load, this | Dan Gohman | 2012-01-05 | 1 | -1/+1 |
| * | Prevent a DAGCombine from firing where there are two uses of | Chandler Carruth | 2012-01-05 | 1 | -0/+20 |
| * | Cleanup and FileCheck-ize a test. | Chandler Carruth | 2012-01-05 | 1 | -18/+40 |
| * | Peephole optimization of ptest-conditioned branch in X86 arch. Performs instr... | Victor Umansky | 2012-01-05 | 2 | -1/+489 |
| * | FileCheck hygiene. | Benjamin Kramer | 2012-01-05 | 5 | -6/+6 |
| * | Reapply r146997, "Heed spill slot alignment on ARM." | Jakob Stoklund Olesen | 2012-01-05 | 2 | -3/+2 |
| * | Teach instcombine all sorts of great stuff about shifts that have exact, nuw or | Nick Lewycky | 2012-01-04 | 1 | -0/+54 |
| * | test/CodeGen/X86/jump_sign.ll: Add -mcpu=pentiumpro for non-x86 hosts. It use... | NAKAMURA Takumi | 2012-01-04 | 1 | -1/+1 |
| * | Have getRegForInlineAsmConstraint return the correct register class when target | Akira Hatanaka | 2012-01-04 | 2 | -0/+55 |
| * | Fix more places which should be checking for iOS, not darwin. | Evan Cheng | 2012-01-04 | 15 | -18/+18 |
| * | For x86, canonicalize max | Evan Cheng | 2012-01-04 | 1 | -1/+15 |
| * | [asan] one more test for asan instrumentation: (*a)++ should be instrumented ... | Kostya Serebryany | 2012-01-04 | 1 | -0/+25 |
| * | Revert r146997, "Heed spill slot alignment on ARM." | Jakob Stoklund Olesen | 2012-01-03 | 2 | -2/+3 |
| * | Revert 147426 because it caused pr11696. | Nadav Rotem | 2012-01-03 | 4 | -31/+10 |
| * | Fix incorrect widening of the bitcast sdnode in case the incoming operand is ... | Nadav Rotem | 2012-01-03 | 1 | -0/+11 |
| * | Enhance DAGCombine for transforming 128->256 casts into a vmovaps, rather | Chad Rosier | 2012-01-03 | 1 | -0/+23 |
| * | Fixed a bug in SelectionDAG.cpp. | Elena Demikhovsky | 2012-01-03 | 1 | -0/+8 |
| * | Fix SCEVExpander to handle loops with no preheader when LSR gives it a | Andrew Trick | 2012-01-02 | 1 | -0/+50 |
| * | Optimize the sequence blend(sign_extend(x)) to blend(shl(x)) since SSE blend ... | Nadav Rotem | 2012-01-02 | 4 | -10/+31 |
| * | Allow CRC32 instructions to be selected when AVX is enabled. | Craig Topper | 2012-01-01 | 1 | -0/+21 |
| * | Fix sfence, lfence, mfence, and clflush to be able to be selected when AVX is... | Craig Topper | 2012-01-01 | 2 | -2/+50 |
| * | Revert 147399. It broke CodeGen/ARM/vext.ll. | Rafael Espindola | 2012-01-01 | 1 | -8/+0 |
| * | Fixed a bug in SelectionDAG.cpp. | Elena Demikhovsky | 2012-01-01 | 1 | -0/+8 |
| * | Add patterns for integer forms of SHUFPD/VSHUFPD with a memory load. | Craig Topper | 2011-12-31 | 1 | -0/+64 |
| * | Fix typo in a SHUFPD and VSHUFPD pattern that prevented SHUFPD/VSHUFPD with a... | Craig Topper | 2011-12-31 | 1 | -2/+34 |
| * | Make use of the exact bit when optimizing '(X >>exact 3) << 1' to eliminate the | Nick Lewycky | 2011-12-31 | 1 | -0/+18 |
| * | Add disassembler support for VPERMIL2PD and VPERMIL2PS. | Craig Topper | 2011-12-30 | 1 | -2/+5 |
| * | Add FMA4 instructions to disassembler. | Craig Topper | 2011-12-30 | 1 | -0/+6 |
| * | Change FMA4 memory forms to use memopv* instead of alignedloadv*. No need to ... | Craig Topper | 2011-12-30 | 1 | -0/+24 |
| * | Fix load size for FMA4 SS/SD instructions. They need to use f32 and f64 size,... | Craig Topper | 2011-12-30 | 1 | -0/+28 |
| * | Cleanup stack/frame register define/kill states. This fixes two bugs: | Hal Finkel | 2011-12-30 | 2 | -8/+14 |
| * | Implement cfi_restore. Patch by Brian Anderson! | Rafael Espindola | 2011-12-29 | 1 | -0/+42 |
| * | Fix execution domains for PS/PD FMA3 instructions. Add SS/SD forms o FMA3 ins... | Craig Topper | 2011-12-29 | 1 | -0/+12 |
| * | Implement .cfi_escape. Patch by Brian Anderson! | Rafael Espindola | 2011-12-29 | 1 | -0/+42 |
| * | Expose FMA3 instructions to the disassembler. | Craig Topper | 2011-12-29 | 1 | -0/+24 |
| * | Change CaptureTracking to pass a Use* instead of a Value* when a value is | Nick Lewycky | 2011-12-28 | 2 | -1/+62 |
| * | Fix type-checking for load transformation which is not legal on floating-poin... | Eli Friedman | 2011-12-28 | 1 | -0/+14 |
| * | PR11662. | Nadav Rotem | 2011-12-28 | 1 | -0/+20 |
