| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | new testcase | Chris Lattner | 2006-05-08 | 1 | -0/+6 |
| * | This test passes now, remove xfail marker | Chris Lattner | 2006-05-07 | 1 | -2/+1 |
| * | new testcase we handle right now. | Chris Lattner | 2006-05-06 | 1 | -6/+20 |
| * | new testcase | Chris Lattner | 2006-05-06 | 1 | -0/+33 |
| * | new testcase from ghostscript that inf looped instcombine | Chris Lattner | 2006-05-06 | 1 | -0/+522 |
| * | New testcase | Chris Lattner | 2006-05-05 | 1 | -0/+8 |
| * | new testcase that crashes the instcombine pass | Chris Lattner | 2006-05-04 | 1 | -0/+50 |
| * | Use movsd to shuffle in the lowest two elements of a v4f32 / v4i32 vector when | Evan Cheng | 2006-05-03 | 1 | -0/+11 |
| * | A few instruction scheduling test cases. | Evan Cheng | 2006-05-03 | 3 | -0/+117 |
| * | New testcase that crashes the new CFE. | Chris Lattner | 2006-05-01 | 1 | -0/+12 |
| * | Intel mode no longer uses %'s on registers | Chris Lattner | 2006-05-01 | 6 | -7/+7 |
| * | new testcase miscompiled by instcombine | Chris Lattner | 2006-04-28 | 1 | -0/+10 |
| * | testcase that crashes the ppc backend, which can't sextinreg(i1) | Chris Lattner | 2006-04-28 | 1 | -0/+10 |
| * | Update. It should use two shufps, not three! | Evan Cheng | 2006-04-28 | 1 | -1/+1 |
| * | new testcase | Chris Lattner | 2006-04-28 | 1 | -0/+7 |
| * | Test case for PR748 | Evan Cheng | 2006-04-28 | 1 | -0/+31 |
| * | This should turn into one vector shuffle instruction. | Chris Lattner | 2006-04-27 | 1 | -0/+14 |
| * | new testcase | Chris Lattner | 2006-04-27 | 1 | -0/+43 |
| * | new testcase | Chris Lattner | 2006-04-26 | 1 | -0/+28 |
| * | another c99 style problem | Andrew Lenharth | 2006-04-25 | 1 | -0/+22 |
| * | Added a movq test case. | Evan Cheng | 2006-04-24 | 1 | -0/+10 |
| * | Two more build_vector tests. | Evan Cheng | 2006-04-22 | 2 | -0/+37 |
| * | movddup is a SSE3 instruction. | Evan Cheng | 2006-04-21 | 1 | -1/+1 |
| * | Add && to each RUN: line (except the last one). | Evan Cheng | 2006-04-21 | 11 | -13/+14 |
| * | More build_vector tests. | Evan Cheng | 2006-04-21 | 3 | -0/+62 |
| * | Check for llc crash. | Evan Cheng | 2006-04-21 | 2 | -0/+2 |
| * | To be replaced with another test. | Evan Cheng | 2006-04-21 | 1 | -21/+0 |
| * | new testcase | Chris Lattner | 2006-04-20 | 1 | -0/+18 |
| * | Don't know what I was thinking... | Evan Cheng | 2006-04-20 | 1 | -1/+1 |
| * | Vector extract element test case. | Evan Cheng | 2006-04-20 | 1 | -0/+25 |
| * | Vector insert test case. | Evan Cheng | 2006-04-20 | 1 | -0/+19 |
| * | allow this dir to get pruned | Chris Lattner | 2006-04-20 | 1 | -3/+0 |
| * | Remove this target's reg tests | Chris Lattner | 2006-04-20 | 6 | -58/+0 |
| * | Fails with all sparcs | Chris Lattner | 2006-04-20 | 1 | -1/+1 |
| * | can we cast between pointers and IntPtrType | Andrew Lenharth | 2006-04-20 | 1 | -0/+15 |
| * | v16i8 splat with 2 punpcklbw and a single pshufd. | Evan Cheng | 2006-04-20 | 1 | -0/+26 |
| * | Another shuffle test. For 4-wide shuffle, no more than 3 {p}shuf*. | Evan Cheng | 2006-04-20 | 1 | -0/+9 |
| * | Added a test case for , e.g. xform pand <0, 0, -1, -1> to a shuffle. | Evan Cheng | 2006-04-20 | 1 | -0/+8 |
| * | Added a movhlps, movlhps test case. | Evan Cheng | 2006-04-20 | 1 | -0/+19 |
| * | New testcase for a codegen crash | Chris Lattner | 2006-04-20 | 1 | -0/+72 |
| * | new testcase | Chris Lattner | 2006-04-18 | 1 | -0/+22 |
| * | Add tests for v8i16 and v16i8 | Chris Lattner | 2006-04-18 | 1 | -2/+16 |
| * | new testcase | Chris Lattner | 2006-04-18 | 1 | -0/+11 |
| * | New testcase, shouldn't touch vrsave | Chris Lattner | 2006-04-17 | 1 | -0/+7 |
| * | New testcase | Chris Lattner | 2006-04-17 | 1 | -0/+5 |
| * | Some more cases that can be generated with two instructions | Chris Lattner | 2006-04-17 | 1 | -0/+9 |
| * | New testcases | Chris Lattner | 2006-04-17 | 1 | -0/+12 |
| * | new testcase | Chris Lattner | 2006-04-17 | 1 | -1/+5 |
| * | New testcase | Chris Lattner | 2006-04-17 | 1 | -0/+3 |
| * | new testcase, these shuffles can be implemented with discrete instructions, | Chris Lattner | 2006-04-17 | 1 | -0/+43 |
