aboutsummaryrefslogtreecommitdiffstats
path: root/test
Commit message (Expand)AuthorAgeFilesLines
* Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post.Hao Liu2013-11-195-0/+2960
* Implement AArch64 SISD intrinsics for vget_high and vget_low.Jiangning Liu2013-11-191-0/+225
* implement MC layer of AArch64 neon instruction PMULL and PMULL2 with 128 bit ...Kevin Qin2013-11-192-0/+16
* Add predicate for AArch64 crypto instructions.Jiangning Liu2013-11-192-2/+6
* [Mips] Support for MicroMips STO refactoring.Jack Carter2013-11-194-13/+19
* llvm-dwarfdump: support for emitting only the debug_types section using -debu...David Blaikie2013-11-191-0/+4
* Revert "COFF: Emit all MCSymbols rather than filtering out some of them"Reid Kleckner2013-11-183-10/+14
* Debug info: Let LowerDbgDeclare perfom the dbg.declare -> dbg.valueAdrian Prantl2013-11-181-0/+102
* The 'optnone' attribute means don't inline anything into this functionPaul Robinson2013-11-183-5/+57
* R600/SI: Fix moveToVALU when the first operand is VSrc.Matt Arsenault2013-11-181-11/+10
* R600/SI: Fix multiple SGPR reads when using VCC.Matt Arsenault2013-11-181-3/+18
* R600/SI: Implement add i64, but do not yet enable.Matt Arsenault2013-11-181-0/+45
* R600/SI: Move patterns to match add / sub to scalar instructionsMatt Arsenault2013-11-184-20/+24
* R600: Enable the IR structurizer by defaultTom Stellard2013-11-183-3/+3
* R600: Fix a crash in the AMDILCFGStrucurizerTom Stellard2013-11-181-0/+62
* R600/SI: Fix illegal VGPR->SGPR copy inside of loopTom Stellard2013-11-181-0/+31
* R600/SI: Fix another case of illegal VGPR->SGPR copyTom Stellard2013-11-181-0/+26
* [ASan] Fix PR17867 - make sure ASan doesn't crash if use-after-scope and use-...Alexey Samsonov2013-11-182-3/+36
* [PR17978] Mark two ARM/fast-isel tests as XFAIL:vg_leak due to GV.NAKAMURA Takumi2013-11-182-0/+4
* LoopVectorizer: Extend the induction variable to a larger typeArnold Schwaighofer2013-11-181-0/+42
* [mips] Fix 'ran out of registers' in MIPS32 with FP64 when generating code fo...Daniel Sanders2013-11-181-0/+31
* [mips][msa] Update encoding of bnz.v (typo).Matheus Almeida2013-11-181-2/+2
* [mips][msa] Fix immediate value of LSA instruction as it was being wrongly en...Matheus Almeida2013-11-181-1/+10
* [AArch64 NEON]Add mov alias for simd copy instructions.Kevin Qin2013-11-181-10/+36
* Implement the newly added ACLE functions for ld1/st1 with 2/3/4 vectors.Hao Liu2013-11-182-101/+1269
* Testcase for PR17964Bill Wendling2013-11-171-0/+10
* DAGCombiner: Partially revert r192795, getNOT was fixed not to create illegal...Benjamin Kramer2013-11-171-0/+2
* Add the cold attribute to error-reporting call sitesHal Finkel2013-11-171-0/+77
* Added a size field to the stack map record to handle subregister spills.Andrew Trick2013-11-172-60/+132
* Use right address space pointer sizeMatt Arsenault2013-11-171-0/+11
* Add a loop rerolling passHal Finkel2013-11-162-0/+423
* Apply the InstCombine fptrunc sqrt optimization to llvm.sqrtHal Finkel2013-11-161-0/+13
* Fix assert on unaligned access to global with different address space size.Matt Arsenault2013-11-161-1/+23
* Fix codegen for null different sized pointer.Matt Arsenault2013-11-161-0/+11
* R600: Make dot_4 instructions predicableVincent Lejeune2013-11-161-0/+27
* InstCombine: fold (A >> C) == (B >> C) --> (A^B) < (1 << C) for constant Cs.Benjamin Kramer2013-11-162-8/+28
* Use correct size for address space in BasicAA.Matt Arsenault2013-11-162-2/+41
* For dwarf4 use the correct form for referencing debug_loc locations,Eric Christopher2013-11-162-2/+2
* Implemented aarch64 Neon scalar vmulx_lane intrinsicsAna Pazos2013-11-153-12/+238
* LoopVectorizer: Use abi alignment for accesses with no alignmentArnold Schwaighofer2013-11-151-0/+33
* [AArch64] Fix the scalar NEON ACLE functions so that they return float/doubleChad Rosier2013-11-151-24/+16
* Path: Recognize COFF import library file magic.Rui Ueyama2013-11-152-0/+17
* ArgumentPromotion: correctly transfer TBAA tags and alignments.Manman Ren2013-11-151-0/+52
* Avoid illegal integer promotion in fastiselBob Wilson2013-11-153-0/+72
* R600/SI: Add VReg_96 register class to SIRegisterInfo::hasVGPRs()Tom Stellard2013-11-151-0/+46
* [mips][msa] Merge basic_operations_little.ll into basic_operations.ll.Daniel Sanders2013-11-152-639/+184
* Add AVX512 unmasked FMA intrinsics and support.Cameron McInally2013-11-151-0/+97
* Fix illegal DAG produced by SelectionDAG::getConstant() for v2i64 typeDaniel Sanders2013-11-159-26/+134
* [NVPTX] Fix handling of indirect callsJustin Holewinski2013-11-151-0/+10
* [mips][msa] Build all the tests in little and big endian modes and correct an...Daniel Sanders2013-11-1559-3/+666
generated by cgit v1.1 at 2024-05-23 07:41:43 +0000