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* Teach valuetracking that byval arguments with a specified alignment areChris Lattner2011-05-231-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | aligned. Teach memcpyopt to not give up all hope when confonted with an underaligned memcpy feeding an overaligned byval. If the *source* of the memcpy can be determined to be adequeately aligned, or if it can be forced to be, we can eliminate the memcpy. This addresses PR9794. We now compile the example into: define i32 @f(%struct.p* nocapture byval align 8 %q) nounwind ssp { entry: %call = call i32 @g(%struct.p* byval align 8 %q) nounwind ret i32 %call } in both x86-64 and x86-32 mode. We still don't get a tailcall though, because tailcalls apparently can't handle byval. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131884 91177308-0d34-0410-b5e6-96231b3b80d8
* add test from PR9164Chris Lattner2011-05-221-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131876 91177308-0d34-0410-b5e6-96231b3b80d8
* testcase for PR9378Chris Lattner2011-05-221-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131875 91177308-0d34-0410-b5e6-96231b3b80d8
* implement PR9315, constant folding exp2 in terms of pow (since hosts withoutChris Lattner2011-05-221-1/+6
| | | | | | | C99 runtimes don't have exp2). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131872 91177308-0d34-0410-b5e6-96231b3b80d8
* RTABI chapter 4.3.4 specifies __eabi_mem* calls. Specifically, __eabi_memset ↵Renato Golin2011-05-221-4/+20
| | | | | | accepts parameters (ptr, size, value) in a different order than GNU's memset (ptr, value, size), therefore the special lowering in AAPCS mode. Implementation by Evzen Muller. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131868 91177308-0d34-0410-b5e6-96231b3b80d8
* Carve out a place in instcombine to put transformations which work knowing ↵Chris Lattner2011-05-221-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | that their result is non-zero. Implement an example optimization (PR9814), which allows us to transform: A / ((1 << B) >>u 2) into: A >>u (B-2) which we compile into: _divu3: ## @divu3 leal -2(%rsi), %ecx shrl %cl, %edi movl %edi, %eax ret instead of: _divu3: ## @divu3 movb %sil, %cl movl $1, %esi shll %cl, %esi shrl $2, %esi movl %edi, %eax xorl %edx, %edx divl %esi, %eax ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131860 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix Bug 9386 - ARM disassembler failed to disassemble conditional bxJohnny Chen2011-05-221-0/+3
| | | | | | | | Modified the patch to .td file supplied by Jyun-Yan You. Add a test case and modified ARMDisassemblerCore.cpp a little bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131859 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR9815: I was trying to get out of "generating code and thenChris Lattner2011-05-221-0/+37
| | | | | | | | | failing to form a memset, then having to delete it" but my approximation isn't safe for self recurrent loops. Instead of doign a hack, just do it the right way. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131858 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a parameter to ConstantFoldTerminator() that callers can use to ask it ↵Frits van Bommel2011-05-221-0/+52
| | | | | | | | | | to also clean up the condition of any conditional terminator it folds to be unconditional, if that turns the condition into dead code. This just means it calls RecursivelyDeleteTriviallyDeadInstructions() in strategic spots. It defaults to the old behavior. I also changed -simplifycfg, -jump-threading and -codegenprepare to use this to produce slightly better code without any extra cleanup passes (AFAICT this was the only place in -simplifycfg where now-dead conditions of replaced terminators weren't being cleaned up). The only other user of this function is -sccp, but I didn't read that thoroughly enough to figure out whether it might be holding pointers to instructions that could be deleted by this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131855 91177308-0d34-0410-b5e6-96231b3b80d8
* I missed a checking with my GVN change. Chris Lattner2011-05-221-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131851 91177308-0d34-0410-b5e6-96231b3b80d8
* fix PR9856, an incorrectly conservative assertion: a global can beChris Lattner2011-05-221-0/+14
| | | | | | | "stored once" even if its address is compared. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131849 91177308-0d34-0410-b5e6-96231b3b80d8
* fix PR9841 by having GVN not process dead loads. This wasChris Lattner2011-05-221-0/+12
| | | | | | | | causing it to get into infinite loops when it would widen a load (which can necessarily leave around dead loads). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131847 91177308-0d34-0410-b5e6-96231b3b80d8
* remove a trivial test, make some other tests less trivial.Chris Lattner2011-05-224-14/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131846 91177308-0d34-0410-b5e6-96231b3b80d8
* make this test less trivial.Chris Lattner2011-05-221-4/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131845 91177308-0d34-0410-b5e6-96231b3b80d8
* Commit test change, forgotten as part of r131838.Nick Lewycky2011-05-221-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131839 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach the inliner to emit llvm.lifetime.start/end, to scope the local variablesNick Lewycky2011-05-221-0/+78
| | | | | | | of the inlinee to the code representing the original function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131838 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix grammar in test.Nick Lewycky2011-05-221-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131831 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert commit 131781, to see if it fixes the x86-64 dragonegg buildbot.Duncan Sands2011-05-212-132/+1
| | | | | | | | | | Original log message: When BasicAA can determine that two pointers have the same base but differ by a dynamic offset, return PartialAlias instead of MayAlias. See the comment in the code for details. This fixes PR9971. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131809 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement mulo x, 2 -> addo x, x in DAGCombiner.Benjamin Kramer2011-05-211-0/+24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131800 91177308-0d34-0410-b5e6-96231b3b80d8
* Merge and FileCheckize test cases.Benjamin Kramer2011-05-213-45/+48
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131799 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "InstCombine: Turn mul.with.overflow(X, 2) into the cheaper ↵Benjamin Kramer2011-05-211-21/+0
| | | | | | | | add.with.overflow(X, X)" It's better to do this in codegen, mul.with.overflow(X, 2) is more canonical because it has only one use on "X". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131798 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: Turn mul.with.overflow(X, 2) into the cheaper ↵Benjamin Kramer2011-05-211-0/+21
| | | | | | add.with.overflow(X, X) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131789 91177308-0d34-0410-b5e6-96231b3b80d8
* When BasicAA can determine that two pointers have the same base butDan Gohman2011-05-212-1/+132
| | | | | | | | differ by a dynamic offset, return PartialAlias instead of MayAlias. See the comment in the code for details. This fixes PR9971. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131781 91177308-0d34-0410-b5e6-96231b3b80d8
* Add fast-isel support for byval calls on x86.Eli Friedman2011-05-201-3/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131764 91177308-0d34-0410-b5e6-96231b3b80d8
* adds some attributes to attribute section when cpu is "xscale"Rafael Espindola2011-05-201-0/+31
| | | | | | | | (this is what used in Android NDK, when architecture is ARMv5) patch by Koan-Sin Tan git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131751 91177308-0d34-0410-b5e6-96231b3b80d8
* fixes target address tBL and tBLX and sets relocation typeRafael Espindola2011-05-201-0/+37
| | | | | | | | of tBL/tBLX to R_ARM_THM_CALL (ARM ELF 4.7.1.6) Patch by koan-sin tan. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131748 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-commit 131641 with fixes; de-pseudoize MOVSX16rr8 and friends.Stuart Hastings2011-05-201-0/+22
| | | | | | | rdar://problem/8614450 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131746 91177308-0d34-0410-b5e6-96231b3b80d8
* Make $fp and $ra callee-saved registers and let PrologEpilogInserter handleAkira Hatanaka2011-05-201-2/+2
| | | | | | | saving and restoring them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131745 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed regression due to commit 131709, which disables vararg tail call ↵Chad Rosier2011-05-201-12/+24
| | | | | | optimizations on Win64 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131740 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename the "sandybridge" subtarget to "corei7-avx", for GCC compatibility.Benjamin Kramer2011-05-201-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131730 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR9960 by teaching SimpleRegisterCoalescing::AdjustCopiesBackFrom() to ↵Cameron Zwarich2011-05-201-0/+31
| | | | | | | | preserve the phikill flag. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131717 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix bug in which nodes that write to argument registers do not get glued ↵Akira Hatanaka2011-05-201-5/+5
| | | | | | with the JALR node. Patch by Sasa Stankovic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131714 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't attempt to tail call optimize for Win64.Chad Rosier2011-05-201-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131709 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r131664 and fix it in instcombine instead. rdar://9467055Evan Cheng2011-05-202-19/+17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131708 91177308-0d34-0410-b5e6-96231b3b80d8
* Add fast-isel support for zeroext and signext ret instructions on x86.Eli Friedman2011-05-191-0/+38
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131689 91177308-0d34-0410-b5e6-96231b3b80d8
* Looks like OS X assemblers (including MC) don't likeRafael Espindola2011-05-191-0/+23
| | | | | | | | | | foo: bar = foo .quad bar Avoid producing it. Fixes PR9951. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131687 91177308-0d34-0410-b5e6-96231b3b80d8
* Oddly people want to use the 'r' constraint for fp constants on x86.Eric Christopher2011-05-191-0/+12
| | | | | | | | Fixes rdar://9218925 Fixes PR9601 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131682 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix up this test to use explicit triples (Win64 passes a different number of ↵Eli Friedman2011-05-191-13/+26
| | | | | | arguments in registers). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131676 91177308-0d34-0410-b5e6-96231b3b80d8
* This fixes one divergence between LLVM and binutils for ARM in theJason W Kim2011-05-191-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | text section. Assume the following bit of annotated assembly: .section .data.rel.ro,"aw",%progbits .align 2 .LAlpha: .long startval(GOTOFF) .text .align 2 .type main,%function .align 4 main: ;;; assume "main" starts at offset 0x20 0x0 push {r11, lr} 0x4 movw r0, :lower16:(.LAlpha-(.LBeta+8)) ;;; ==> (.AddrOf(.LAlpha) - ((.AddrOf(.LBeta) - .AddrOf(".")) + 8) ;;; ==> (??? - ((16-4) + 8) = -20 0x8 movt r0, :upper16:(.LAlpha-(.LBeta+8)) ;;; ==> (.AddrOf(.LAlpha) - ((.AddrOf(.LBeta) - .AddrOf(".")) + 8) ;;; ==> (??? - ((16-8) + 8) = -16 0xc ... blah .LBeta: 0x10 add r0, pc, r0 0x14 ... blah .LGamma: 0x18 add r1, pc, r1 Above snippet results in the following relocs in the .o file for the first pair of movw/movt instructions 00000024 R_ARM_MOVW_PREL_NC .LAlpha 00000028 R_ARM_MOVT_PREL .LAlpha And the encoded instructions in the .o file for main: must be 00000020 <main>: 20: e92d4800 push {fp, lr} 24: e30f0fec movw r0, #65516 ; 0xffec i.e. -20 28: e34f0ff0 movt r0, #65520 ; 0xfff0 i.e. -16 However, llc (prior to this commit) generates the following sequence 00000020 <main>: 20: e92d4800 push {fp, lr} 24: e30f0fec movw r0, #65516 ; 0xffec - i.e. -20 28: e34f0fff movt r0, #65535 ; 0xffff - i.e. -1 What has to happen in the ArmAsmBackend is that if the relocation is PC relative, the 16 bits encoded as part of movw and movt must be both addends, not addresses. It makes sense to encode addresses by right shifting the value by 16, but the result is incorrect for PIC. i.e., the right shift by 16 for movt is ONLY valid for the NON-PCRel case. This change agrees with what GNU as does, and makes the PIC code run. MC/ARM/elf-movt.s covers this case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131674 91177308-0d34-0410-b5e6-96231b3b80d8
* ADD64ri32 sign extends its argument, so we need to use a R_X86_64_32S.Rafael Espindola2011-05-191-0/+7
| | | | | | | | Fixes PR9934. We really need to start tblgening the relocation info :-( git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131669 91177308-0d34-0410-b5e6-96231b3b80d8
* Align i64 arguments to 64 bit boundaries.Akira Hatanaka2011-05-191-0/+34
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131668 91177308-0d34-0410-b5e6-96231b3b80d8
* crc32 with 64-bit output zeros upper 32-bits. rdar://9467055Evan Cheng2011-05-191-0/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131664 91177308-0d34-0410-b5e6-96231b3b80d8
* Move test to Transforms/InstCombine.Stuart Hastings2011-05-192-19/+16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131634 91177308-0d34-0410-b5e6-96231b3b80d8
* Add test for PR9946.Rafael Espindola2011-05-191-0/+18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131621 91177308-0d34-0410-b5e6-96231b3b80d8
* More instcombine cleanup, towards improving debug line info.Eli Friedman2011-05-181-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131604 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle perfect shuffle case that generates a vrev for vectors of floats.Tanya Lattner2011-05-181-0/+15
| | | | | | | Add test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131582 91177308-0d34-0410-b5e6-96231b3b80d8
* When forming an ICmpZero LSRUse, normalize the non-IV operandDan Gohman2011-05-181-0/+91
| | | | | | | | of the comparison, so that the resulting expression is fully normalized. This fixes PR9939. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131576 91177308-0d34-0410-b5e6-96231b3b80d8
* Disassembly of tBcc was wrongly adding 4 to the SignExtend'ed imm8:'0' ↵Johnny Chen2011-05-181-0/+3
| | | | | | immediate operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131565 91177308-0d34-0410-b5e6-96231b3b80d8
* Enables vararg functions that pass all arguments via registers to be ↵Chad Rosier2011-05-182-2/+87
| | | | | | optimized into tail-calls when possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131560 91177308-0d34-0410-b5e6-96231b3b80d8
* More instcombine cleanup aimed towards improving debug line info.Eli Friedman2011-05-181-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131559 91177308-0d34-0410-b5e6-96231b3b80d8
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