| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Thumb1 functions using @llvm.returnaddress were not saving the incoming LR. | Bob Wilson | 2010-06-22 | 1 | -1/+3 |
| * | Move a 64-bit test to the 64-bit file. Fixes an llvm-mc assertion | Eric Christopher | 2010-06-22 | 2 | -6/+6 |
| * | Add SSE so these actually pass on non-X86 hosts. | Dale Johannesen | 2010-06-22 | 2 | -2/+2 |
| * | Fix a subtle multiclass bug: when using class inheritance on | Bruno Cardoso Lopes | 2010-06-22 | 1 | -0/+2 |
| * | Corresponding test changes for r106564. | Bill Wendling | 2010-06-22 | 1 | -4/+4 |
| * | Move v-binop-widen tests to X86 since they don't work on all platforms | Mon P Wang | 2010-06-22 | 2 | -3/+10 |
| * | Remove the SimpleJoin optimization from SimpleRegisterCoalescing. | Jakob Stoklund Olesen | 2010-06-22 | 1 | -1/+1 |
| * | Allow "exhaustive" trip count evaluation on phi nodes with all | Dan Gohman | 2010-06-22 | 1 | -0/+19 |
| * | Tail merging pass shall not break up IT blocks. rdar://8115404 | Evan Cheng | 2010-06-22 | 1 | -0/+127 |
| * | Teach two-address lowering how to unfold a load to open up commuting | Dan Gohman | 2010-06-21 | 5 | -18/+21 |
| * | Fix PR7421: bug in kill transferring logic. It was ignoring loads / stores wh... | Evan Cheng | 2010-06-21 | 1 | -0/+148 |
| * | Make this test more robust in case LLVM ever decides to align the global | Dan Gohman | 2010-06-21 | 1 | -1/+1 |
| * | Add missing FileCheck call. | Dale Johannesen | 2010-06-21 | 1 | -1/+1 |
| * | test case for r106438. | Devang Patel | 2010-06-21 | 1 | -0/+13 |
| * | Fix PR 7433. Silly typo in non-Darwin ARM tail call | Dale Johannesen | 2010-06-21 | 1 | -0/+145 |
| * | Add some codegen patterns for x86_64-linux-gnu tls codegen matching. | Eric Christopher | 2010-06-21 | 1 | -0/+6 |
| * | Add the check to the testcase of r106419. | Kalle Raiskila | 2010-06-21 | 1 | -0/+3 |
| * | Mark the SPU 'lr' instruction to never have side effects. | Kalle Raiskila | 2010-06-21 | 4 | -13/+18 |
| * | Fix the lowering of VECTOR_SHUFFLE on SPU to handle splats. | Kalle Raiskila | 2010-06-21 | 1 | -1/+6 |
| * | Fix lowering of VECTOR_SHUFFLE on SPU. Old algorithm | Kalle Raiskila | 2010-06-21 | 1 | -0/+10 |
| * | Fix a crash caused by dereference of MBB.end(). rdar://8110842 | Evan Cheng | 2010-06-20 | 1 | -0/+35 |
| * | Include the use kind along with the expression in the key of the | Dan Gohman | 2010-06-19 | 1 | -0/+309 |
| * | Fix ScalarEvolution's "exhaustive" trip count evaluation code to avoid | Dan Gohman | 2010-06-19 | 1 | -0/+31 |
| * | Refactor aliased packed logical instructions, also add | Bruno Cardoso Lopes | 2010-06-19 | 2 | -0/+128 |
| * | Disable sibcall optimization for Thumb1 for now since Thumb1RegisterInfo::emi... | Evan Cheng | 2010-06-19 | 3 | -5/+16 |
| * | Shrink down code and add for free AVX {MIN,MAX}P{S,D}{rm,rr} instructions | Bruno Cardoso Lopes | 2010-06-19 | 2 | -0/+64 |
| * | fix rdar://7873482 by teaching the instruction encoder to emit | Chris Lattner | 2010-06-19 | 2 | -0/+11 |
| * | Move ARM if-conversion before post-ra scheduling. | Evan Cheng | 2010-06-18 | 1 | -1/+1 |
| * | Allow ARM if-converter to be run after post allocation scheduling. | Evan Cheng | 2010-06-18 | 3 | -6/+12 |
| * | TwoAddressInstructionPass::CoalesceExtSubRegs can insert INSERT_SUBREG | Jakob Stoklund Olesen | 2010-06-18 | 1 | -0/+28 |
| * | Fix an inverted condition. | Evan Cheng | 2010-06-18 | 3 | -4/+2 |
| * | When using ADDri to get the address of a stack object, 255 is a conservative | Jakob Stoklund Olesen | 2010-06-18 | 1 | -0/+16 |
| * | Revert r106304 (105548 and friends), which are the SCEVComplexityCompare | Dan Gohman | 2010-06-18 | 1 | -1/+1 |
| * | Teach tablegen how to inherit from classes in 'defm' definitions. | Bruno Cardoso Lopes | 2010-06-18 | 1 | -0/+36 |
| * | Reapply 105540, 105542, and 105548, and revert r105732. | Dan Gohman | 2010-06-18 | 1 | -1/+1 |
| * | Enable tail calls on ARM by default, with some | Dale Johannesen | 2010-06-18 | 6 | -0/+220 |
| * | Treat the ARM inline asm {cc} constraint as a physreg (%CPSR), just like X86 | Jakob Stoklund Olesen | 2010-06-18 | 1 | -0/+12 |
| * | Don't write a file named "&1". | Dan Gohman | 2010-06-18 | 1 | -1/+1 |
| * | Disable indvars on loops when LoopSimplify form is not available. | Dan Gohman | 2010-06-18 | 1 | -1/+18 |
| * | Don't maintain a set of deleted nodes; instead, use a HandleSDNode | Dan Gohman | 2010-06-18 | 1 | -0/+28 |
| * | Add {mix,max}{ss,sd}{rr,rm} AVX forms. | Bruno Cardoso Lopes | 2010-06-18 | 2 | -0/+65 |
| * | Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass, | Dan Gohman | 2010-06-18 | 2 | -1/+6 |
| * | Make this test less fragile. | Dan Gohman | 2010-06-18 | 1 | -5/+7 |
| * | Testcase for llvm-gcc 106225. | Dale Johannesen | 2010-06-17 | 1 | -0/+16 |
| * | Remove arm_apcscc from the test files. It is the default and doing this | Rafael Espindola | 2010-06-17 | 110 | -358/+358 |
| * | For a tablegen expression such as !if(a,b,c), let 'a' | Bruno Cardoso Lopes | 2010-06-17 | 1 | -0/+11 |
| * | let the '!eq' expression support 'int' and 'bit' types | Bruno Cardoso Lopes | 2010-06-16 | 1 | -0/+11 |
| * | Allow a register to be redefined multiple times in a basic block. | Jakob Stoklund Olesen | 2010-06-16 | 1 | -0/+21 |
| * | modify so the test doesn't drop an output file in the test source directory. | Jim Grosbach | 2010-06-16 | 1 | -1/+1 |
| * | Be specific. Use FileCheck. | Devang Patel | 2010-06-16 | 1 | -3/+4 |
