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Age
Files
Lines
*
DAGCombine: Avoid an edge case where it tried to create an i0 type for (x & 0...
Benjamin Kramer
2013-05-21
1
-0
/
+16
*
Add checks that the proper predeined stubs are being called to the test case.
Reed Kotler
2013-05-21
1
-0
/
+58
*
Dwarf: use a single line table to generate assembly when .loc is used.
Manman Ren
2013-05-21
1
-0
/
+6
*
Add some additional functions to the list of helper functions for
Reed Kotler
2013-05-21
1
-0
/
+67
*
PR14606: Debug Info for namespace aliases/DW_TAG_imported_module
David Blaikie
2013-05-20
1
-29
/
+49
*
add polly to check-all
Sebastian Pop
2013-05-20
1
-0
/
+9
*
[mips] Add (setne $lhs, 0) instruction selection pattern.
Akira Hatanaka
2013-05-20
1
-0
/
+10
*
[mips] Trap on integer division by zero.
Akira Hatanaka
2013-05-20
2
-11
/
+41
*
[NVPTX] Fix mis-use of CurrentFnSym in NVPTXAsmPrinter. This was causing a s...
Justin Holewinski
2013-05-20
1
-0
/
+37
*
R600: Fix rotr.ll on non-asserts builds
Tom Stellard
2013-05-20
1
-6
/
+2
*
R600/SI: Add pattern for rotr
Tom Stellard
2013-05-20
1
-9
/
+19
*
R600: Swap the legality of rotl and rotr
Tom Stellard
2013-05-20
1
-0
/
+29
*
R600/SI: Add patterns for 64-bit shift operations
Tom Stellard
2013-05-20
1
-0
/
+3
*
VSTn instructions have a number of encoding constraints which are not impleme...
Mihai Popa
2013-05-20
2
-4
/
+45
*
Q registers are encoded in fields of the same length as D registers. As Q reg...
Mihai Popa
2013-05-20
1
-2
/
+2
*
[SystemZ] Add long branch pass
Richard Sandiford
2013-05-20
6
-3
/
+200
*
[NVPTX] Add GenericToNVVM IR converter to better handle idiomatic LLVM IR inputs
Justin Holewinski
2013-05-20
1
-0
/
+25
*
[NVPTX] Fix i1 kernel parameters and global variables. ABI rules say we need...
Justin Holewinski
2013-05-20
2
-0
/
+37
*
PR15868 fix.
Stepan Dyatkovskiy
2013-05-20
3
-8
/
+64
*
Disable remote MCJIT on pre-v6 ARM
Renato Golin
2013-05-20
1
-0
/
+11
*
Also expand 64-bit bitcasts.
Jakob Stoklund Olesen
2013-05-20
1
-0
/
+16
*
Implement spill and fill of I64Regs.
Jakob Stoklund Olesen
2013-05-20
1
-0
/
+8
*
Mark i64 SETCC as expand so it is turned into a SELECT_CC.
Jakob Stoklund Olesen
2013-05-20
1
-0
/
+10
*
Don't use %g0 to materialize 0 directly.
Jakob Stoklund Olesen
2013-05-19
2
-1
/
+12
*
Select i64 values with %icc conditions.
Jakob Stoklund Olesen
2013-05-19
1
-0
/
+11
*
Add floating point selects on %xcc predicates.
Jakob Stoklund Olesen
2013-05-19
1
-0
/
+22
*
Implement SPselectfcc for i64 operands.
Jakob Stoklund Olesen
2013-05-19
1
-0
/
+11
*
[Sparc] Rearrange integer registers' allocation order so that register alloca...
Venkatraman Govindaraju
2013-05-19
1
-1
/
+1
*
Handle i64 FrameIndex nodes in SPARC v9 mode.
Jakob Stoklund Olesen
2013-05-19
1
-0
/
+10
*
Invalidate instruction cache when setting memory to be executable.
Tim Northover
2013-05-19
5
-15
/
+4
*
Temporarily disable this test because it is failing when using libc++.
Bob Wilson
2013-05-19
1
-2
/
+3
*
Move the remaining simplify-libcalls tests to instcombine, merging most of th...
Benjamin Kramer
2013-05-19
12
-138
/
+137
*
Unsupported remote JIT on ARM
Renato Golin
2013-05-18
9
-6
/
+17
*
isKnownToBeAPowerOfTwo: (X & Y) + Y is a power of 2 or zero if y is also.
David Majnemer
2013-05-18
1
-0
/
+14
*
LoopVectorize: Handle single edge PHIs
Arnold Schwaighofer
2013-05-18
1
-0
/
+22
*
Check InlineAsm clobbers in PPCCTRLoops
Hal Finkel
2013-05-18
1
-0
/
+38
*
X86: Bad peephole interaction between adc, MOV32r0
David Majnemer
2013-05-18
1
-0
/
+27
*
Support unaligned load/store on more ARM targets
JF Bastien
2013-05-17
2
-130
/
+147
*
Convert obj2yaml to use yamlio.
Rafael Espindola
2013-05-17
1
-96
/
+78
*
R600: Lower int_load_input to copyFromReg instead of Register node
Vincent Lejeune
2013-05-17
1
-0
/
+121
*
R600: Use bottom up scheduling algorithm
Vincent Lejeune
2013-05-17
15
-17
/
+19
*
R600: Use depth first scheduling algorithm
Vincent Lejeune
2013-05-17
2
-2
/
+2
*
R600: Relax some vector constraints on Dot4.
Vincent Lejeune
2013-05-17
1
-1
/
+1
*
R600: Improve texture handling
Vincent Lejeune
2013-05-17
1
-16
/
+16
*
R600: Rename 128 bit registers.
Vincent Lejeune
2013-05-17
1
-16
/
+16
*
R600: Fix encoding for R600 family GPUs
Tom Stellard
2013-05-17
1
-0
/
+24
*
[Sparc] Implements hasReservedCallFrame and hasFP.
Venkatraman Govindaraju
2013-05-17
1
-0
/
+16
*
X86: Make shuffle -> shift conversion more aggressive about undefs.
Benjamin Kramer
2013-05-17
2
-2
/
+26
*
FileCheckize test.
Benjamin Kramer
2013-05-17
1
-5
/
+15
*
[PowerPC] Merge/rename PPC fixup types
Ulrich Weigand
2013-05-17
1
-25
/
+25
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