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path: root/utils/TableGen/ARMDecoderEmitter.cpp
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* [AVX] Make Inits FoldableDavid Greene2011-07-111-10/+11
* Don't require pseudo-instructions to carry encoding information.Jim Grosbach2011-07-061-0/+3
* Pseudo-ize the Thumb tTPsoft instruction.Jim Grosbach2011-06-301-4/+0
* Pseudo-ize the Thumb tPOP_RET instruction.Jim Grosbach2011-06-301-2/+2
* Remove redundant Thumb2 ADD/SUB SP instruction definitions.Jim Grosbach2011-06-291-5/+1
* ARM RSCS* don't need explicit TableGen decoder checks.Jim Grosbach2011-06-291-4/+0
* Refactor away tSpill and tRestore pseudos in ARM backend.Jim Grosbach2011-06-291-3/+1
* Disassembly of A8.6.59 LDR (literal) Encoding T1 (16-bit thumb instruction) s...Johnny Chen2011-04-221-0/+5
* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-151-2/+2
* Thumb disassembler was erroneously rejecting "blx sp" instruction.Johnny Chen2011-04-111-0/+4
* delegate the disassembly of t2ADR to the more generic t2ADDri12/t2SUBri12 ins...Johnny Chen2011-03-251-0/+5
* The opcode names ("tLDM", "tLDM_UPD") used for conflict resolution have been ...Johnny Chen2011-03-241-2/+2
* The ARM disassembler was confused with the 16-bit tSTMIA instruction.Johnny Chen2011-03-241-0/+5
* ADR was added with the wrong encoding for inst{24-21}, and the ARM decoder wa...Johnny Chen2011-03-241-0/+4
* Remove no-longer-correct special case for disasm of ARM BL instructions.Jim Grosbach2011-03-121-5/+0
* Pseudo-ize the ARM 'B' instruction.Jim Grosbach2011-03-111-3/+0
* Remove dead code. These ARM instruction definitions no longer exist.Jim Grosbach2011-03-111-8/+0
* Remove dead code. These ARM instruction definitions no longer exist.Jim Grosbach2011-03-111-9/+0
* Pseudo-ize VMOVDcc and VMOVScc.Jim Grosbach2011-03-111-3/+2
* Remove dead code. These ARM instruction definitions don't exist.Jim Grosbach2011-03-111-14/+0
* ARM VDUPfd and VDUPfq can just be patterns. The instruction is the sameJim Grosbach2011-03-111-6/+0
* Remove dead code. These ARM instruction definitions don't exist.Jim Grosbach2011-03-111-10/+0
* ARM VDUPLNfq and VDUPLNfd definitions can just be Pat<>s for VDUPLN32qJim Grosbach2011-03-111-4/+1
* ARM VREV64df and VREV64qf can just be patterns. The instruction is the sameJim Grosbach2011-03-111-7/+0
* Tidy up since ARM MOVCCi and MOVCCi16 are now pseudos.Jim Grosbach2011-03-111-6/+6
* Properly pseudo-ize MOVCCr and MOVCCs.Jim Grosbach2011-03-101-4/+3
* Memory barrier instructions don't need special handling in tblgen anymore.Jim Grosbach2011-03-101-3/+1
* TableGen should not ignore BX instructions for the ARM disassembler. pr9368.Bob Wilson2011-03-031-1/+1
* pr9367: Add missing predicated BLX instructions.Bob Wilson2011-03-031-1/+1
* Add FixedLenDecoderEmitter, the skeleton of a new disassembler emitter for fi...Owen Anderson2011-02-181-96/+101
* Add support for parsing and encoding ARM's official syntax for the BFI instru...Bruno Cardoso Lopes2011-01-181-0/+4
* Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://8755755Jim Grosbach2010-12-141-8/+3
* Remove the rest of the *_sfp Neon instruction patterns.Bob Wilson2010-12-131-5/+0
* Merge DEBUG statements.Bill Wendling2010-12-131-8/+8
* eliminate the Records global variable, patch by Garrison Venn!Chris Lattner2010-12-131-3/+3
* Remove reference to the CMPz instruction patterns for ARM.Jim Grosbach2010-12-071-8/+1
* I did it wrong. Don't disregard these encodings here.Bill Wendling2010-12-031-7/+0
* Ignore decode table conflicts in the tMOVgpr2tgpr, tMOVgpr2gpr, and tMOVtgpr2gprBill Wendling2010-12-031-0/+7
* The VLDMQ/VSTMQ instructions are reprented as true Pseudo-insts now (i.e.,Jim Grosbach2010-11-301-5/+0
* Tidy up.Jim Grosbach2010-11-301-2/+3
* Delete a few no longer needed references to pseudos.Jim Grosbach2010-11-301-4/+0
* Pseudo-ize Thumb2 jump tables with explicit MC lowering to the rawJim Grosbach2010-11-291-6/+1
* Rename t2 TBB and TBH instructions to reference that they encode the jump tableJim Grosbach2010-11-291-1/+1
* Merge System into Support.Michael J. Spencer2010-11-291-1/+1
* Encode the multi-load/store instructions with their respective modes ('ia',Bill Wendling2010-11-161-5/+5
* factor the operand list (and related fields/operations) out of Chris Lattner2010-11-011-2/+2
* A few 80 column cleanupsJim Grosbach2010-10-081-1/+1
* Move checking for t2MOVCCi16 to the right place.Jim Grosbach2010-10-071-6/+7
* Fix typo in comment.Nick Lewycky2010-10-071-1/+1
* Allow use of the 16-bit literal move instruction in CMOVs for Thumb2 mode.Jim Grosbach2010-10-071-5/+5
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