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path: root/utils/TableGen/CodeGenInstruction.h
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* Rename usesCustomDAGSchedInserter to usesCustomInserter, and update aDan Gohman2009-10-291-1/+1
* Add instruction flags: hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. WhenEvan Cheng2009-10-011-0/+2
* Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning.Dan Gohman2008-12-031-1/+1
* Add a flag to indicate that an instruction is as cheap (or cheaper) than a moveBill Wendling2008-05-281-1/+4
* Remove isImplicitDef TargetInstrDesc flag.Evan Cheng2008-03-151-1/+0
* Start inferring side effect information more aggressively, and fix many bugs ...Chris Lattner2008-01-101-2/+1
* add a mayLoad property for machine instructions, a correlary to mayStore.Chris Lattner2008-01-081-1/+1
* rename hasVariableOperands() -> isVariadic(). Add some comments.Chris Lattner2008-01-071-1/+1
* the name field of instructions is never set to a non-empty string, Chris Lattner2008-01-071-5/+0
* rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.Chris Lattner2008-01-061-1/+1
* rename isStore -> mayStore to more accurately reflect what it captures.Chris Lattner2008-01-061-1/+1
* Split the impl of CodeGenInstruction out to its own .cpp file, add a getName(...Chris Lattner2008-01-061-1/+5
* remove attributions from utils.Chris Lattner2007-12-291-2/+2
* Add flags to indicate that there are "never" side effects or that there "may be"Bill Wendling2007-12-141-0/+2
* Oops. Forgot these.Evan Cheng2007-12-131-0/+1
* Add a flag for indirect branch instructions.Owen Anderson2007-11-121-0/+1
* No need for noResults anymore.Evan Cheng2007-07-201-1/+0
* Change instruction description to split OperandList into OutOperandList andEvan Cheng2007-07-191-0/+4
* Try committing again. Add OptionalDefOperand. Remove clobbersPred.Evan Cheng2007-07-101-1/+1
* Revert the earlier change that removed the M_REMATERIALIZABLE machineDan Gohman2007-06-261-0/+1
* Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoadDan Gohman2007-06-191-1/+0
* Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit.Evan Cheng2007-06-191-0/+1
* Add clobbersPred - instruction that clobbers condition code / register which ...Evan Cheng2007-06-061-0/+1
* Rename M_PREDICATED to M_PREDICABLE; opcode can be specified isPredicable wit...Evan Cheng2007-05-161-1/+1
* Recognize target instruction flag 'isReMaterializable'.Evan Cheng2007-03-191-0/+1
* Remove the isTwoAddress property from the CodeGenInstruction class. It shouldChris Lattner2006-11-151-1/+24
* ADd support for adding constraints to suboperandsChris Lattner2006-11-151-2/+18
* simplify the way operand flags and constraints are handled, making it easierChris Lattner2006-11-061-8/+3
* recognize ppc's blr instruction as predicatedChris Lattner2006-11-061-0/+1
* Unbreak VC++ build.Jeff Cohen2006-11-051-1/+2
* Add operand constraints to TargetInstrInfo.Evan Cheng2006-11-011-0/+8
* * Remove instruction fields hasInFlag / hasOutFlag and added SNDPInFlag andEvan Cheng2006-01-091-2/+0
* Added field noResults to Instruction.Evan Cheng2005-12-261-0/+1
* * Support for hasInFlag and hasOutFlag (on instructions). Remove nameless FLAGEvan Cheng2005-12-231-0/+2
* * Commit the fix (by Chris) for a tblgen type inferencing bug.Evan Cheng2005-12-041-0/+1
* Nuke CodeGenInstruction's ValueType member, it is no longer used.Nate Begeman2005-12-011-9/+3
* fit into 80 columnsNate Begeman2005-11-301-2/+2
* Teach tblgen about instruction operands that have multiple MachineInstrChris Lattner2005-11-191-2/+9
* spell this variable rightChris Lattner2005-08-261-1/+1
* Expose a new flag to TargetInstrInfoChris Lattner2005-08-261-0/+1
* For now, just emit empty operand info structures.Chris Lattner2005-08-191-0/+1
* Figure out how many operands each instruction has, keep track of whetherChris Lattner2005-08-181-2/+5
* Remove trailing whitespaceMisha Brukman2005-04-221-3/+3
* Expose isConvertibleToThreeAddress and isCommutable bits to the code generator.Chris Lattner2005-01-021-0/+2
* Add support for the isLoad and isStore flags, needed by the instruction sched...Nate Begeman2004-09-281-0/+2
* Turn the hasDelaySlot flag into the M_DELAY_SLOT_FLAGChris Lattner2004-09-281-0/+1
* Make the AsmWriter a first-class tblgen object. Allow targets to specifyChris Lattner2004-08-141-1/+1
* Start parsing more information from the Operand informationChris Lattner2004-08-111-5/+25
* Parse the operand list of the instruction. We currently support register and...Chris Lattner2004-08-011-1/+18
* Add, and start using, the CodeGenInstruction class. This class representsChris Lattner2004-08-011-0/+49